Patents Assigned to Toshiba America Electronics Components, Inc.
  • Patent number: 10520548
    Abstract: A system and method for monitoring, testing or configuring electrical devices includes an input amplifier having an input connected to a device load line to generate an output linearly proportional to a voltage on the load line. An output of the input amplifier is connected to a photodiode in an optical path with a phototransistor. The phototransistor generates an output proportional to light generated by the photodiode, and this output is amplified and passed to an analog-to-digital converter. The converter generates a digital voltage level corresponding to the amplified output of the phototransistor. Digital temperature information is used to further enhance linearity of a generated digital voltage level. Multiple quantum well photodiodes further improve measurement linearity.
    Type: Grant
    Filed: October 17, 2017
    Date of Patent: December 31, 2019
    Assignee: Toshiba America Electronic Components, Inc.
    Inventor: Jurgis Astrauskas
  • Publication number: 20170076790
    Abstract: According to one embodiment, a semiconductor memory device includes first and second memory cells, a word line, first and second bit lines, a sense amplifier and a driver. The first and second memory cells have first and second threshold voltages, respectively. The word line is electrically connected to the first and second memory cells. The first and second bit lines are electrically connected to the first and second memory cells, respectively. The driver increases gradually the voltage of the word line. When the voltage of the word line is increased gradually by the driver, the sense amplifier senses the first and second threshold voltages in ascending order.
    Type: Application
    Filed: March 14, 2016
    Publication date: March 16, 2017
    Applicants: Kabushiki Kaisha Toshiba, Toshiba America Electronic Components, Inc.
    Inventors: Takahiko SASAKI, Go SHIKATA
  • Patent number: 9380226
    Abstract: Optimization of image acquisition relative resource usage, particularly power, is accomplished by use of a beehive algorithm, inspired by observation of the way that bees communicate foraging information by a dance. Analysis of relative gain associated with captured pixels facilitates isolation of one or more areas of particular interest for focusing one or more subsequent image capture operations. Selective enablement of picture acquisition elements targeting each isolated area facilitates obtaining images containing needed or useful information while minimizing resource use.
    Type: Grant
    Filed: June 4, 2014
    Date of Patent: June 28, 2016
    Assignee: Toshiba America Electronic Components, Inc.
    Inventor: Rakesh Sethi
  • Patent number: 9379892
    Abstract: A system and method for securing processing devices includes a police bridge disposed in one or more data busses between a central processing and input/output peripherals, components or components. The police bridge is suitably disposed between northbridge logic and southbridge logic. Alternatively, or in addition to such placement, a police bridge is suitably place between southbridge logic and super I/O logic. A police bridge is suitably a system-on-chip or fixed or programmable hardware. The police bridge monitors or controls its associated bus to determine whether acceptable data, with an associated certificate in other embodiments, is being communicated and signaling is generated accordingly.
    Type: Grant
    Filed: May 30, 2013
    Date of Patent: June 28, 2016
    Assignee: Toshiba America Electronic Components, Inc.
    Inventor: Rakesh Sethi
  • Patent number: 9313418
    Abstract: A system and method for analysis of fluids, particularly bodily fluids such as saliva, uses an active, electrically-driven substrate for supporting an amalgamate of fluid and nanoparticles selected to adhere to one or more proteins. The nanoparticles affect light that is directed on or through the amalgamate. Different light directions, light polarization planes, and light wavelengths are used to obtain optical properties of the amalgamate. Once obtained, these values are compared to earlier or baseline values to determine a property of the amalgamate. Values or ranges are compared to earlier values, suitably with empirical association with maladies or conditions, to facilitate detection or diagnosis.
    Type: Grant
    Filed: May 30, 2013
    Date of Patent: April 12, 2016
    Assignee: Toshiba America Electronic Components, Inc.
    Inventor: Rakesh Sethi
  • Patent number: 9295423
    Abstract: A system and method for assisting in a determination of one or more maladies associated with a human voice anatomy utilizes voice information acquired over at least two temporally displaced acquisitions. Acquired voice samples, including plural vowel sounds, are digitized and passed through one or more bandpass filters to isolate one or more frequency ranges. Curve fitting of acquired data is completed in accordance with a plurality of parameter weights applied in either a time domain or frequency domain model of the voice. This process is repeated a second, later time, for the same human, and the same process is completed for the subsequently-acquired voice information. A difference between the curve information in the respective data sets is analyzed relative to the weights, and corresponding changes are correlated to maladies of various areas of the human voice anatomy.
    Type: Grant
    Filed: April 3, 2013
    Date of Patent: March 29, 2016
    Assignee: Toshiba America Electronic Components, Inc.
    Inventor: Rakesh Sethi
  • Patent number: 9220462
    Abstract: A diagnostic system for biometric mapping of facial skin includes a light filter a light sensor, a non-transient memory, a correlation processor, and an output unit. The light filter filters light reflected from an object to a filtered light signal. The light sensor receives the filtered light signal and generates a first electronic image signal representative of an image of the object in accordance with the filtered light signal. The memory stores a first electronic diagnostic signal representative of a predetermined mal-condition of the object. The processor determines a correlation between the first electronic image signal and the first electronic diagnostic signal, generates a correlation signal representative of a strength of the correlation, determines a diagnosis of the associated object based on the correlation signal, and generates a diagnosis signal in accordance with the diagnosis. The output unit generates a diagnosis result signal in accordance with the diagnosis signal.
    Type: Grant
    Filed: May 24, 2013
    Date of Patent: December 29, 2015
    Assignee: Toshiba America Electronic Components, Inc.
    Inventor: Rakesh Sethi
  • Patent number: 9220413
    Abstract: According to one embodiment, an apparatus for detecting obstructions in biological vessels includes a cylindrical hollow stent with an expandable body portion having an outer surface configured to engage the inner surface of the lumen of the vessel to urge the vessel against collapse, and an imaging system operatively coupled with stent. The imaging system includes a first power source, a light generating element, a light sensor generating a first signal representative of light received by the sensor element from the light generating elements, and a processor unit receiving the first signal and processing the first signal in accordance with image processing logic stored in a memory of the processor unit to generate an image signal representative of as image of associated target material such as plaque obstructing the flow. The imaging system and stent may be formed on opposite sides of a flexible organic substrate.
    Type: Grant
    Filed: April 25, 2013
    Date of Patent: December 29, 2015
    Assignee: Toshiba America Electronic Components, Inc.
    Inventor: Rakesh Sethi
  • Patent number: 9208864
    Abstract: A memory includes cytokines, such as macromolecule proteins, as a poly-state data storage. Each fold state of multiple fold states of a protein are associated with a data value. Current flow through the protein is associated with a resistance of the protein associated with its current fold state. Application of light, electric fields or heat via an associated element or elements facilitates placement of a protein in a fold state that corresponds to an associated resistance and correlates with an incoming data value. Measuring of current or resistance allows for reading of a data value associated with the protein.
    Type: Grant
    Filed: October 14, 2013
    Date of Patent: December 8, 2015
    Assignee: Toshiba America Electronic Components, Inc.
    Inventor: Rakesh Sethi
  • Publication number: 20150103591
    Abstract: A memory includes cytokines, such as macromolecule proteins, as a poly-state data storage. Each fold state of multiple fold states of a protein are associated with a data value. Current flow through the protein is associated with a resistance of the protein associated with its current fold state. Application of light, electric fields or heat via an associated element or elements facilitates placement of a protein in a fold state that corresponds to an associated resistance and correlates with an incoming data value. Measuring of current or resistance allows for reading of a data value associated with the protein.
    Type: Application
    Filed: October 14, 2013
    Publication date: April 16, 2015
    Applicant: TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.
    Inventor: Rakesh SETHI
  • Publication number: 20140323875
    Abstract: According to one embodiment, an apparatus for detecting obstructions in biological vessels includes a cylindrical hollow stent with an expandable body portion having an outer surface configured to engage the inner surface of the lumen of the vessel to urge the vessel against collapse, and an imaging system operatively coupled with stent. The imaging system includes a first power source, a light generating element, a light sensor generating a first signal representative of light received by the sensor element from the light generating elements, and a processor unit receiving the first signal and processing the first signal in accordance with image processing logic stored in a memory of the processor unit to generate an image signal representative of as image of associated target material such as plaque obstructing the flow. The imaging system and stent may be formed on opposite sides of a flexible organic substrate.
    Type: Application
    Filed: April 25, 2013
    Publication date: October 30, 2014
    Applicant: Toshiba America Electronic Components, Inc.
    Inventor: Rakesh SETHI
  • Publication number: 20140303980
    Abstract: A system and method for assisting in a determination of one or more maladies associated with a human voice anatomy utilizes voice information acquired over at least two temporally displaced acquisitions. Acquired voice samples, including plural vowel sounds, are digitized and passed through one or more bandpass filters to isolate one or more frequency ranges. Curve fitting of acquired data is completed in accordance with a plurality of parameter weights applied in either a time domain or frequency domain model of the voice. This process is repeated a second, later time, for the same human, and the same process is completed for the subsequently-acquired voice information. A difference between the curve information in the respective data sets is analyzed relative to the weights, and corresponding changes are correlated to maladies of various areas of the human voice anatomy.
    Type: Application
    Filed: April 3, 2013
    Publication date: October 9, 2014
    Applicant: Toshiba America Electronic Components, Inc.
    Inventor: Rakesh SETHI
  • Patent number: 8772942
    Abstract: A metallic liner stack including at least a Group VIIIB element layer and a CuMn alloy layer is deposited within a trench in a dielectric layer. Copper is deposited on the metallic liner stack and planarized to form a conductive interconnect structure, which can be a metal line, a metal via, or a combination thereof. The deposited copper and the metallic liner stack are annealed before or after planarization. The Mn atoms are gettered by the Group VIIIB element layer to form a metallic alloy liner including Mn and at least one of Group VIIIB elements. Mn within the metallic alloy liner combines with oxygen during the anneal to form MnO, which acts as a strong barrier to oxygen diffusion, thereby enhancing the reliability of the conductive interconnect structure.
    Type: Grant
    Filed: January 26, 2010
    Date of Patent: July 8, 2014
    Assignees: International Business Machines Corporation, Toshiba America Electronic Components, Inc.
    Inventors: Daniel C. Edelstein, Takeshi Nogami, Kazumichi Tsumura, Takamasa Usui
  • Patent number: 8716134
    Abstract: A metallic liner stack including at least a Group VIIIB element layer and a CuMn alloy layer is deposited within a trench in a dielectric layer. Copper is deposited on the metallic liner stack and planarized to form a conductive interconnect structure, which can be a metal line, a metal via, or a combination thereof. The deposited copper and the metallic liner stack are annealed before or after planarization. The Mn atoms are gettered by the Group VIIIB element layer to form a metallic alloy liner including Mn and at least one of Group VIIIB elements. Mn within the metallic alloy liner combines with oxygen during the anneal to form MnO, which acts as a strong barrier to oxygen diffusion, thereby enhancing the reliability of the conductive interconnect structure.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: May 6, 2014
    Assignees: International Business Machines Corporation, Toshiba America Electronic Components, Inc.
    Inventors: Daniel C. Edelstein, Takeshi Nogami, Kazumichi Tsumura, Takamasa Usui
  • Publication number: 20140070328
    Abstract: Semiconductor devices and methods of fabricating semiconductor devices are provided. Two or more layers can be formed on a silicon substrate, wherein one or more of the layers are used for controlling an isolation recess. A first layer can comprise a first material and a second layer can comprise a second material.
    Type: Application
    Filed: September 12, 2012
    Publication date: March 13, 2014
    Applicant: TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.
    Inventors: Masakazu Goto, Akira Hokazono
  • Publication number: 20140054754
    Abstract: Systems and methods are presented for filling an opening with material of a high integrity. A material having properties in a first physical state suitable for formation of a hard mask layer and in a second physical state having properties facilitating removal of the former hard mask layer is utilized. Utilizing the material as a mask layer and subsequently removing the material enables a number of mask layers to be minimized in a subsequent filling operation (e.g., metallization). Material amenable to being in a first physical state and a second physical state is an optically reactive material. The optically reactive dielectric can comprise an element or compound which can act as an agent/catalyst in the optical conversion process along with any element or compound which can act as an accelerator for the optical reaction. Conversion can be brought about by exposure to electromagnetic radiation and/or application of thermal energy.
    Type: Application
    Filed: August 21, 2012
    Publication date: February 27, 2014
    Applicant: TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.
    Inventors: Tadayoshi Watanabe, Hideaki Masuda, Hideshi Miyajima
  • Publication number: 20140054648
    Abstract: Structures and methods are presented relating to formation of finFET semiconducting devices. A finFET device is presented comprising fin(s) formed on a substrate, wherein the fin(s) has a needle-shaped profile. The needle-shaped profile, in conjunction with at least a buffer layer or a doped layer, epitaxially formed on the fin(s), facilitates strain to be induced into the fin(s) by the buffer layer or the doped layer. The fin(s) can comprise silicon aligned on a first plane, while at least one of the buffer layer or the doped layer are grown on a second plane, the alignment of the first and second planes are disparate and are selected such that formation of the buffer layer or the doped layer generates a stress in the fin(s). The generated stress results in a strain being induced into the fin(s) channel region, which can improve electron and/or hole mobility in the channel.
    Type: Application
    Filed: August 27, 2012
    Publication date: February 27, 2014
    Applicant: TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.
    Inventors: Hiroshi Itokawa, Akira Hokazono
  • Patent number: 8656429
    Abstract: The subject application is directed to a system and method for displaying and navigating a graphical two-dimensional array of a plurality of available channels on an associated display unit. A two-dimensional array of channel boxes is first generated on an associated display. Input signals are then received corresponding to a respective plurality of available channels. At least one of the received input signals is then parsed to acquire channel identification data indicating at least one channel associated with the parsed signal. Image data associated with the indicated channel is then captured. Thereafter, at least one channel box is populated in the array with the acquired identification data and the captured image data.
    Type: Grant
    Filed: November 12, 2008
    Date of Patent: February 18, 2014
    Assignee: Toshiba America Electronic Components, Inc.
    Inventor: Hsi-Heng Sean Yang
  • Publication number: 20140027914
    Abstract: Systems and methods are presented for preventing removal of material comprising a metal gate during removal of a mask layer in a semiconductor structure. Upon exposure of the metal line during formation of a via opening the exposed portion of the metal line undergoes chemical modification to form a passivation layer. The passivation layer is subsequently covered by an etch selectivity layer, wherein the etch selectivity layer prevents removal of at least one of a portion of the metal line or the passivation layer during removal of a hard mask layer comprising the semiconductor structure. In an alternate approach, the metal line is formed with a capping layer which, following exposure by a via opening formed in the semiconductor structure, is chemically modified to form a layer having etch selectivity to acts as a protective layer during removal of a hard mask layer comprising the semiconductor layer.
    Type: Application
    Filed: July 24, 2012
    Publication date: January 30, 2014
    Applicant: TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.
    Inventors: Hideyuki Tomizawa, Masao Ishikawa, Hideshi Miyajima
  • Publication number: 20130328155
    Abstract: The disclosed aspects relate to controlling density of photomasks. One or more unprintable auxiliary patterns can be placed near a mask feature as well as onto a location of a feature of the main pattern. If a density is measured and is not within an acceptable density range, one or more printable auxiliary patterns can be replaced with unprintable auxiliary patterns and/or one or more unprintable auxiliary patterns can be replaced with printable auxiliary patterns. The disclosed aspects can be utilized to create a photomask and/or a semiconductor device, such as a large scale integrated circuit device, that comprises the photomask.
    Type: Application
    Filed: June 7, 2012
    Publication date: December 12, 2013
    Applicant: TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.
    Inventor: Kenji Konomi