Patents Assigned to TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
  • Publication number: 20240063738
    Abstract: Embodiments provide a motor control device including a current detection element connected to a DC side of the inverter circuit to generate a signal corresponding to a current value and configured to determine a rotor position based on at least a phase current of the motor and to generate a two-phase or three-phase PWM signal pattern to follow the rotor position. The PWM signal generation unit generates a phase-shifted PWM signal pattern with three phases such that the current detection unit is capable of detecting two-phase currents at two fixed time-points within a carrier wave cycle of the PWM signal. The motor control device is configured to estimate a rotating magnetic field angle and a speed of the motor based on the estimated magnetic flux interlinkage of an armature coil of the motor and to output a switching command so as to cause the PWM signal generation unit to generate different PWM signal according to a level of a modulation rate of a motor applied voltage.
    Type: Application
    Filed: August 11, 2023
    Publication date: February 22, 2024
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Nobuyuki SUZUKI
  • Patent number: 11907113
    Abstract: According to one embodiment, a magnetic disk device comprises magnetic disks, heads, and a controller. The controller does not allocate logical addresses to sectors of a first area to be specified in such a manner as to correspond to a defect existing in a predetermined recording area, the first area being within the predetermined recording area constituted of a plurality of cylinders adjacent to each other in the magnetic disks, and uniquely allocates logical addresses to sectors of a second area other than the first area. The controller makes allocation of logical addresses to the sectors of the second area different from each other according to the number of defects existing in the predetermined recording area.
    Type: Grant
    Filed: August 4, 2022
    Date of Patent: February 20, 2024
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Takeshi Shibasaki
  • Patent number: 11908925
    Abstract: A semiconductor device includes a first electrode, a second electrode, a first semiconductor region, a second semiconductor region, a third semiconductor region, a fourth semiconductor region, a fifth semiconductor region, a first gate electrode, and a second gate electrode. The first gate electrode faces the second semiconductor region via a first insulating film. The second gate electrode faces the second semiconductor region via a second insulating film and faces the second electrode via a third insulating film contacting the second insulating film. The fifth semiconductor region includes a boundary portion that electrically contacts the second electrode. A distance between an upper surface of the fourth semiconductor region and the first electrode is greater than a distance between the boundary portion and the first electrode.
    Type: Grant
    Filed: September 7, 2021
    Date of Patent: February 20, 2024
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Yoko Iwakaji, Tomoko Matsudai, Hiroko Itokazu, Keiko Kawamura
  • Patent number: 11908912
    Abstract: A semiconductor device includes: a first electrode; a first semiconductor layer; a first insulating film extending downward from an upper surface of the first semiconductor layer, the first insulating film being columnar; a second electrode located in the first insulating film, the second electrode extending in a vertical direction, the second electrode being columnar; a second semiconductor layer partially provided in an upper layer portion of the first semiconductor layer, the second semiconductor layer being next to the first insulating film with the first semiconductor layer interposed; a third semiconductor layer partially provided in an upper layer portion of the second semiconductor layer; and a third electrode located higher than the upper surface of the first semiconductor layer, the third electrode overlapping a portion of the first insulating film, a portion of the first semiconductor layer, and a portion of the second semiconductor layer when viewed from above.
    Type: Grant
    Filed: February 17, 2022
    Date of Patent: February 20, 2024
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tatsuya Nishiwaki, Tsuyoshi Kachi, Shuhei Tokuyama
  • Patent number: 11908972
    Abstract: A semiconductor light-emitting device includes a substrate having a first energy bandgap, a first semiconductor layers on the substrate, an active layer on the first semiconductor layer, and a second semiconductor layer on the active layer. The active layer includes a quantum well layer, and a first barrier layer between the first semiconductor layer and the quantum well layer. The first semiconductor layer has a second energy bandgap wider than the first energy bandgap. The quantum well layer has a third energy bandgap narrower than the first and second energy bandgaps. The second semiconductor layer has a fourth energy bandgap wider than the third energy bandgap. The substrate has a refractive index greater than a refractive index of the first semiconductor layer. The refractive index of the first semiconductor layer is not less than a refractive index of the first barrier layer.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: February 20, 2024
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Akira Tanaka, Hideto Sugawara, Katsufumi Kondo, Masanobu Iwamoto, Kenji Isomoto, Hiroaki Ootsuka
  • Patent number: 11908897
    Abstract: Among multiple drain regions, a contact surface area between second contacts and a drain region most proximal to a central portion of an element region in a second direction is less than a contact surface area between second contacts and a drain region disposed on an outermost side of the element region in the second direction. The multiple drain regions are arranged in the second direction.
    Type: Grant
    Filed: October 8, 2021
    Date of Patent: February 20, 2024
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Kanako Komatsu
  • Patent number: 11900964
    Abstract: According to an embodiment, there is provided a disk device including a disk, a head, a preamplifier and a controller. The head writes information to the disk according to a write current. The preamplifier causes the write current to flow through the head. The controller is capable of causing the preamplifier to perform current zero control for maintaining an amplitude of the write current at zero, and is capable of changing a time for maintaining the amplitude of the write current at zero according to a pattern of write data.
    Type: Grant
    Filed: August 24, 2022
    Date of Patent: February 13, 2024
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Tomokazu Okubo
  • Patent number: 11899968
    Abstract: According to one embodiment, a magnetic disk apparatus is provided with a magnetic disk, a buffer memory, and a control circuit. The magnetic disk has plural bands, each of which is a storage area in which data is written by the method of SMR. The control circuit receives a read request from outside. If the data requested to be read is first data of an update target stored in a first band among plural bands, the control circuit reads the first data from the first band, stores the first data in a buffer memory, and updates the first data in the buffer memory. Then, the control circuit transmits the first data in the buffer memory to the outside and writes the first data in the buffer memory to one of the plural bands.
    Type: Grant
    Filed: March 8, 2022
    Date of Patent: February 13, 2024
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Masahisa Miyake, Kazuya Takada
  • Patent number: 11899097
    Abstract: A distance measurement device of an embodiment includes a first device including a first reference signal source and a first transmitter-receiver, a second device including a second reference signal source and a second transmitter-receiver, and a calculation unit configured to calculate a distance between the first device and the second device. One of a first distance measurement signal and a second distance measurement signal is transmitted once or more, and another is transmitted twice or more. The calculation unit calculates the distance based on a total of three or more pieces of first phase information and second phase information acquired through transmission of the distance measurement signals three times or more in total, a first sampling period based on a first reference signal, and a second sampling period based on a second reference signal.
    Type: Grant
    Filed: March 12, 2021
    Date of Patent: February 13, 2024
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Shoji Ootaka, Masaki Nishikawa, Katsuya Nonin, Hiroshi Yoshida, Masayoshi Oshiro
  • Patent number: 11901871
    Abstract: According to one embodiment, a semiconductor device includes the following configuration. A detection circuit detects a state of a clock signal. An amplification circuit changes a gain based on the state of the clock signal detected by the detection circuit. An amplification circuit amplifies a first voltage with the gain and outputs a second voltage obtained as a result of amplification. A conversion circuit converts the second voltage output from the amplification circuit to first data. An isolation circuit includes a driver and a receiver electrically isolated from the driver. The driver transmits a signal corresponding to the first data to the receiver. The receiver outputs second data corresponding to the signal transmitted from the driver. The output circuit outputs the second data output from the isolation circuit.
    Type: Grant
    Filed: January 17, 2023
    Date of Patent: February 13, 2024
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventor: Hitoshi Imai
  • Publication number: 20240046959
    Abstract: According to one embodiment, a magnetic head includes a first magnetic pole, a second magnetic pole, and a stacked body. The first magnetic pole includes a first face and a second face crossing the first face. The second face includes a first face region continuous with the first face. The second magnetic pole includes a third face and a fourth face crossing the third face, and the fourth face includes a second face region that is continuous with the third face. The first face and the third face are along the third direction. The stacked body is provided between the first face region and the second face region. The stacked body includes a first magnetic layer, and a second magnetic layer provided between the first magnetic layer and the second face region. The second magnetic layer includes a second magnetic layer face facing the second face region.
    Type: Application
    Filed: February 6, 2023
    Publication date: February 8, 2024
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Yuji NAKAGAWA, Masayuki TAKAGISHI, Naoyuki NARITA, Tomoyuki MAEDA, Tazumi NAGASAWA, Ryo OSAMURA, Kosuke KURIHARA
  • Publication number: 20240048079
    Abstract: An electric motor drive apparatus includes an electric motor. A power conversion device, a controller, and a current detector. The controller calculates a phase of an armature flux linkage of the electric motor by using a flowing current detected by the current detector. The calculating a phase of an armature flux linkage of the electric motor includes calculating an armature flux linkage of the electric motor including an initial value of an armature flux linkage of the electric motor which is calculated from a rotational position of the electric motor estimated by using a motor flux of the electric motor measured in advance and the flowing current.
    Type: Application
    Filed: August 2, 2023
    Publication date: February 8, 2024
    Applicants: KABUSHIKI KAISHA TOSHIBA, Toshiba Electronic Devices & Storage Corporation
    Inventors: Takashi TAKAGI, Toshimitsu AIZAWA, Tadashi ASUKAI
  • Publication number: 20240046017
    Abstract: An arithmetic method by a computer according to the present embodiment includes model generating, execution processing, and electromagnetic interference noise generating. The model generating generates a model including a circuit model configured by a plurality of element models connected to each other and a motor model driven by the circuit model. The execution processing computes a motor current of the motor model generated in each of first calculating steps over time by using information on electrical characteristics of each element model. The electromagnetic interference noise generating generates electromagnetic interference noise in accordance with a frequency at a predetermined measurement point in the model in each of predetermined time segments in a measurement period, and generates an electromagnetic interference noise level at each frequency in the measurement period based on an electromagnetic interference noise level in accordance with the frequency in each of the time segments.
    Type: Application
    Filed: March 8, 2023
    Publication date: February 8, 2024
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Hitoshi IMI, Motochika OKANO, Hidetoshi MIYAHARA, Takahiro AOKI
  • Patent number: 11891713
    Abstract: A semiconductor device manufacturing jig for electroplating a substrate includes a conductive member. The substrate includes an inner part including a first surface, and an outer rim part surrounding the inner part. The outer rim part has a ring shape that protrudes further than the first surface in a direction perpendicular to the first surface. The conductive member causes a current to flow in the inner part by contacting a portion of the first surface of the inner part without contacting the outer rim part.
    Type: Grant
    Filed: August 25, 2021
    Date of Patent: February 6, 2024
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventor: Takeyuki Suzuki
  • Publication number: 20240038715
    Abstract: A semiconductor device according to an embodiment includes a metal frame separated from a semiconductor chip, and a metal connector connected to the semiconductor chip via a first bonding material on an electrode of the semiconductor chip, and connected to the metal frame via a second bonding material on a disposition surface of the metal frame. The metal connector includes: a first part connected to the first bonding material and serving as a first end; a second part connected to the first part and rising toward the metal frame; a third part connected to the second part and serving as a second end; and a notch that opens on a second-end-side surface formed on the third part, adjacent to a connecting surface connected to the second bonding material, and opposed to a tilted surface of the metal frame adjacent to and tilted with respect to the disposition surface.
    Type: Application
    Filed: July 13, 2023
    Publication date: February 1, 2024
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Kakeru YAMAGUCHI
  • Patent number: 11888466
    Abstract: According to one embodiment, electronic circuitry includes: a detection circuit including a diode, a cathode side of the diode being connected to one end of a semiconductor switching element and an anode side of the diode being connected to a first node; a comparator circuit configured to compare a voltage of the first node and a threshold voltage and generate a first signal; a first filter connected between the first node and another end of the semiconductor switching element and configured to suppress the voltage of the first node in a first period based on a control signal indicating turn-on of the semiconductor switching element; and a control circuit configured to determine at least one of the threshold voltage and the first period based on the first signal.
    Type: Grant
    Filed: March 4, 2022
    Date of Patent: January 30, 2024
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Koutaro Miyazaki
  • Patent number: 11886753
    Abstract: A controller provides a plurality of first sections with numerical information on a first scale. The plurality of first sections are obtained by dividing a recording surface of a magnetic disk in units of first memory areas in each of which a first volume of data can be written by an SMR method. The first scale corresponds to a sequence of the first sections. The controller provides a plurality of second sections with numerical information on a second scale. The plurality of second sections are obtained by dividing the recording surface of the magnetic disk in units of second memory areas in each of which the first volume of data can be written by a CMR method. The second scale corresponds to a sequence of the second sections. The controller executes a plurality of commands in order based on a numerical information on the first scale or the second scale.
    Type: Grant
    Filed: March 4, 2022
    Date of Patent: January 30, 2024
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Takao Abe, Tatsuo Nitta, Takeshi Hara
  • Patent number: 11888990
    Abstract: An information processing device of one embodiment includes a first memory being volatile, a second memory being non-rewritable and nonvolatile, and a processor. A first program, a second program, and a digital signature for the second program are loaded into the first memory. A third program and a public key are stored in the second memory. Upon satisfaction of a certain condition during execution of the first program, the processor verifies the second program on the basis of the digital signature and the public key, in accordance with the third program. After finding a result of the verification as a pass, the processor analyzes the first program in accordance with the second program. The processor refrains from analyzing the first program after finding the result of the verification as a fail.
    Type: Grant
    Filed: August 26, 2020
    Date of Patent: January 30, 2024
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Yasuto Aramaki, Susumu Yasuda, Tatsuaki Iwata
  • Patent number: 11887634
    Abstract: A magnetic disk device of an embodiment includes: a head structure including at least one reproducing head and main magnetic pole gap installation portion behind a flying slider and including at least two thermal actuators; and a control unit that can independently control the thermal actuators and that sets spacing of the reproducing head and the main magnetic pole gap installation portion with respect to a recording medium by setting a rotational speed at the time of contact, which rotational speed is a rotational speed of the recording medium, to be lower than a normal rotational speed when the reproducing head and the main magnetic pole gap installation portion are brought into contact with the recording medium.
    Type: Grant
    Filed: September 13, 2022
    Date of Patent: January 30, 2024
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventor: Toru Watanabe
  • Patent number: 11887633
    Abstract: According to one embodiment, a magnetic disk device comprising a magnetic disk, a magnetic head, and a controller that registers an address and a positioning error, determines whether or not a positioning error of a second sector that is two tracks ahead in a radial direction of a first sector to which a data is written is registered, and when the positioning error of the second sector is registered, sets a first threshold that allows a write operation for a positioning error of the first sector based on the positioning error of the second sector, and determines whether or not the positioning error of the first sector exceeds the first threshold, and stops the write operation when the positioning error of the first sector exceeds the first threshold.
    Type: Grant
    Filed: September 9, 2022
    Date of Patent: January 30, 2024
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Takayuki Kawabe, Akihiko Takeo