Abstract: A method of manufacturing a suspension structure including providing a substrate, forming a first photoresist pattern on the substrate, heating the first photoresist pattern to harden it as a sacrificial layer, forming a second photoresist pattern on the substrate and the sacrificial layer, the second photoresist pattern exposing a part of the substrate and the sacrificial layer, forming a structure layer on the substrate, the second photoresist pattern, and the sacrificial layer, performing a lift off process to remove the second photoresist pattern and the structure layer above the second photoresist pattern, and performing a dry etching process to remove the sacrificial layer in order to make the structure layer become the suspension structure.

Abstract: A method of edge bevel rinse. First, a wafer having a coating material layer disposed thereon is provided. A light beam is optically projected on the wafer to form a reference pattern. The reference pattern defines a central region, and a bevel region surrounding the central region on the surface of the wafer. Subsequently, the coating material layer positioned in the bevel region is removed according to the reference pattern.

Abstract: A substrate having a sacrificial layer and a structural layer disposed on the front surface of the substrate is provided. Thereon an opening is formed on the back surface of the substrate and the sacrificial layer is exposed partially. A wet etching process is performed to etch the sacrificial layer via the opening to form a suspended structure. Finally, a gas injection process is performed. The gas injection process comprises blowing a gas on the suspended structure via the opening and consequently preventing the suspended structure from sticking to the substrate.

Abstract: A micro sample heating apparatus has a substrate, a micro heating device disposed on a first surface of the substrate, a cavity having an inclined sidewall and corresponding to the micro heating device positioned in a second surface of the substrate, and an isolation structure positioned on the second surface of the substrate. The isolation structure has an opening corresponding to the cavity, and the cavity and the opening form a sample room.

Abstract: A method of fabricating microconnectors. A wafer is provided, and a dielectric layer is formed on a first surface of the wafer. The dielectric layer is bonded to a support wafer, and a thinning process is performed. A second surface of the wafer is then bonded to the support wafer, and a conductive wiring pattern is formed on the dielectric layer. An insulating layer is formed on the dielectric layer and the conductive wiring pattern. A portion of the insulating layer is removed to expose the conductive wiring pattern, and a portion of the dielectric layer and the wafer is removed to divide the wafer into a plurality of microconnectors.

Abstract: A method of manufacturing a suspension structure including providing a substrate, forming a hole and a sacrificial layer filling the hole on the substrate, forming a patterned photoresist layer on the substrate and the sacrificial layer, the patterned photoresist layer exposing a part of the substrate and the sacrificial layer, forming a structure layer on the substrate, the patterned photoresist layer, and the sacrificial layer, performing a lift off process to remove the patterned photoresist layer and the structure layer above the photoresist pattern, and performing a dry etch process to remove the sacrificial layer in order to make the structure layer and the hole become the suspension structure and the chamber.

Abstract: A piezoresistive pressure sensor test sample is first provided, and a zero offset of the piezoresistive pressure sensor test sample is measured. Subsequently, a stress deviation corresponding to the zero offset is calculated. Thereafter, at least a piezoresistive pressure sensor under the same process condition as the piezoresistive pressure sensor test sample is formed. When forming the piezoresistive pressure sensor, at least a stress-adjusting thin film is formed on at least a surface of the piezoresistive pressure sensor to calibrate the zero offset of the piezoresistive pressure sensor.

Abstract: A method for wafer-level package. A cap wafer having cavities is bonded to a support wafer, and a portion of the cap wafer is etched through. The cap wafer is released from the support wafer, and bonded to a transparent wafer, and a portion of the cap wafer corresponding to the cavities is removed so that the remaining cap wafer forms a plurality of support blocks. A device wafer is provided, and the support blocks are bonded to the device wafer so that the support blocks and the transparent wafer hermitically seal the devices disposed in the device wafer.

Abstract: A method of performing a double-sided process is provided. First, a wafer having a structural pattern disposed on the front surface is provided. Following that, a plurality of front scribe lines are defined on the structural pattern, and a filling layer is filled into the front scribe lines. Subsequently, the structural pattern is bonded to a carrier wafer with a bonding layer, and a plurality of back scribe lines are defined on the back surface of the wafer. Finally, the filling layer filled in the front scribe lines is removed.

Abstract: First, a device wafer having a substrate layer and a device layer is provided. Then, a first mask pattern is utilized to remove the device layer uncovered by the first mask pattern. Subsequently, a medium layer is formed on the surface of the device wafer, and the medium layer is then bonded to a carrier wafer. Thereafter, a second mask pattern is utilized to remove the substrate layer uncovered by the second mask pattern. Finally, the medium layer is separated from the carrier wafer, the substrate layer is bonded to an extendable film, and the medium layer is then removed.

Abstract: A substrate is provided. The substrate includes a plurality of devices disposed in the substrate, a plurality of contact pads disposed on a surface of the substrate and electrically connected to the devices, and a surface dielectric layer positioned on the surface of the substrate. Thereafter, a surface treatment process including at least a plasma etching process is performed. Subsequently, at least a plasma enhanced chemical vapor deposition (PECVD) process is performed to form a dielectric layer on a surface dielectric layer. The PECVD process is performed in a high frequency/low frequency alternating manner. Following that, a masking pattern on the dielectric layer is formed, and an anisotropic etching process is carried out to form a plurality of openings corresponding to the contact pads in the dielectric layer. The openings expose the contact pads, and each opening has an outwardly-inclined sidewall.

Abstract: A method of fabricating a diaphragm of a capacitive microphone device. First, a substrate is provided, and a dielectric layer on a first surface of the substrate is formed. Than, a plurality of silicon spacers are formed on a surface of the dielectric layer, and a diaphragm layer is formed on a surface of the silicon spacers and the surface of the dielectric layer. Subsequently, a planarization layer is formed on the diaphragm layer, and a second surface of the substrate is etched to form a plurality of openings corresponding to the diaphragm layer disposed on the surface of the dielectric layer. Thereafter, the dielectric layer exposed through the openings is removed, and planarization layer is removed.

Abstract: A wafer, having at least a spindle region and at least two through regions alongside the spindle region, is provided. The wafer in the spindle region is partially removed from the bottom surface. Thereafter, the bottom surface is bonded to a carrier with a bonding layer, and the wafer in the through regions is completely removed from the top surface.

Abstract: A wafer comprising a front surface and a back surface is provided. The wafer further includes a front pattern on the front surface, the front pattern having a plurality of holes. A low-viscosity fluid is formed on the front surface and filled into the holes. Following that, a high-viscosity fluid is formed and filled into the holes by diffusion.

Abstract: A first wafer is provided, and a photosensitive masking-and-bonding pattern is formed on the surface of the first wafer. Then, an etching process using the photosensitive masking-and-bonding pattern as a hard mask is performed to form a wafer pattern on the surface of the first wafer. Finally, the first wafer is bonded to a second wafer with the photosensitive masking-and-bonding pattern.

Abstract: A method of etching cavities having different aspect ratios. An etching stop layer is formed on the bottom surface of a substrate, and a mask pattern is formed on the top surface of the substrate. The mask pattern includes a plurality of sacrificial patterns positioned on both a first cavity predetermined region and a second cavity predetermined region. Then, an etching process is performed to remove the substrate not covered by the mask layer. Then, the etching stop layer is removed, as well as the sacrificial patterns and the substrate covered by the sacrificial patterns.

Abstract: A method of forming a wafer backside interconnecting wire includes forming a mask layer on the back surface, the mask layer including at least an opening corresponding to the bonding pad, performing a first etching process from the back surface to remove the wafer unprotected by the mask layer to form a recess, removing the mask layer, and forming an interconnecting wire on the back surface.