Abstract: An improved phase-locked loop circuit includes a variable-frequency oscillator that generates a first oscillator signal, a reference signal source that generates a second oscillator signal, a control block that generates a select signal, and a frequency divider that receives as an input signal one of the first and second oscillator signals. The frequency divider also receives the select signal from the control block. The frequency divider generates a plurality of frequency-divided signals in response to the input signal, and passes through a selected one of the plurality of frequency-divided signals as an output signal in response to the select signal. The frequency divider also synchronizes its output signal to its input signal. The phase-locked loop also includes a frequency comparator that receives the output signal of the frequency divider and a signal derived from one of the first and second oscillator signals.

Abstract: Accordingly, an RF amplifier with reduced power consumption is disclosed. In one embodiment, the RF amplifier includes first and second transistors for amplifying signals. The first transistor has a gate coupled to an input signal source. The second transistor has a gate coupled to the gate of the first transistor for signals in the operating frequency range of the amplifier. The second transistor also has a drain terminal coupled to the drain of the first transistor for signals in the operating frequency range. A first bias voltage generator circuit coupled to the gate of the first transistor provides a first bias voltage to the gate of the first transistor. Likewise, a second bias voltage generator circuit coupled to the gate of the second transistor provides a second bias voltage to the gate of the second transistor. An impedance connected between the source of the second transistor and the drain of the first transistor conducts a bias current.