Abstract: The present invention provides a system and method for optimizing power consumption in Multimedia Signal Processing in mobile devices. The system comprises a Media (speech, audio, image, and video) codec encoder module, a Media codec decoder module (106) and pre-processing and postprocessing (filtering, deblocking filter, Analytics, person detect, keyword/keyframe spotting) modules modules. The pre-processing and post-processing modules are implemented on a DSPNLIW processor, while the Media encoder and decoder modules are implemented on a CPU with SIMD extensions. This pipeline (asynchronous RPC, non-blocking) implementation of modules in multi-core reduces current consumption in the SoC by up to 50 percent compared to an implementation of the modules in a multiple CPU/DSP/VLIW core with synchronous RPC (blocking). The significant reduction in current consumption of the modules enables reduction of power consumption in the Multimedia processing use case.

Abstract: The present invention provides a system and method for optimizing power consumption in voice communication in mobile devices. The system comprises pre-processing modules, a speech codec encoder module, a speech codec decoder module and post-processing modules. The pre-processing and post-processing modules are implemented on a DSP/VLIW processor, while the speech encoder and decoder modules are implemented on a CPU with SIMD extensions. This pipelined implementation of modules in multi-core reduces current consumption in the SoC by up to 50 percent compared to an implementation of the modules in a single DSP/VLIW core. The significant reduction in current consumption of the modules enables reduction of power consumption in the talk time.

Abstract: The present invention provides a system and method for optimizing power consumption in video communication in mobile devices. The system comprises a video codec encoder module, a video codec decoder module and post-processing filtering module (Deblocking filter) modules. The post-processing modules are implemented on a DSP/VLIW processor, while the video encoder and decoder modules are implemented on a CPU with SIMD extensions. This pipelined implementation of modules in multi-core reduces current consumption in the SoC by up to 50 percent compared to an implementation of the modules in a single/multiple DSP/VLIW core. The significant reduction in current consumption of the modules enables reduction of power consumption in the video call time. Thus, the invention provides a simple method of optimizing power consumption by multi core implementation of the modules in a video call in mobile devices.