Abstract: A continuously tunable linear phase filter having a ground connection includes a three-terminal Bessel filter having an input terminal for receiving a signal, an output terminal for delivering a signal, a control terminal for receiving a control voltage, and a varactor. Each of the terminals are in signal communication with each other and the varactor is in signal communication with each of the terminals and ground, the varactor being responsive to the control voltage at the control terminal. The capacitance of the varactor is continuously adjustable in response to a change in the control voltage at the control terminal, thereby enabling continuous tuning of the continuously tunable linear phase filter in response to the control voltage.
Type:
Grant
Filed:
December 6, 2007
Date of Patent:
June 30, 2009
Assignee:
TSI Telsys, Inc.
Inventors:
Julio Fernandez Varela, David Childress Newman, Robert James Conrad
Abstract: A continuously tunable linear phase filter having a ground connection includes a three-terminal Bessel filter having an input terminal for receiving a signal, an output terminal for delivering a signal, a control terminal for receiving a control voltage, and a varactor. Each of the terminals are in signal communication with each other and the varactor is in signal communication with each of the terminals and ground, the varactor being responsive to the control voltage at the control terminal. The capacitance of the varactor is continuously adjustable in response to a change in the control voltage at the control terminal, thereby enabling continuous tuning of the continuously tunable linear phase filter in response to the control voltage.
Type:
Grant
Filed:
February 26, 2003
Date of Patent:
February 5, 2008
Assignee:
TSI Telsys, Inc.
Inventors:
Julio Fernandez Varela, David Childress Newman, Robert James Conrad
Abstract: A system and method for sending and receiving data with a reliable communication protocol. The system includes a computer at a node having a backplane, a CPU board plugged into the backplane, software instructions for the CPU, and a special network board plugged into the backplane. The CPU board, software, and network card act to implement the TCP/IP protocol suite. The network card or board includes an interface to receive data packets from the physical layer, and circuitry to verify the TCP checksum before de-encapsulation and routing of the TCP segment by the network layer software. It also includes circuitry to automatically prepare the acknowledgement signal to be sent by the receiving computer to the sending computer. It additionally includes circuitry to calculate the error detecting code on outgoing signals from the sending computer to the receiving computer.
Type:
Grant
Filed:
August 21, 2000
Date of Patent:
February 5, 2002
Assignee:
TSI TelSys, Inc.
Inventors:
Toby D. Bennett, Donald J. Davis, Jonathan C. Harris, Ian D. Miller
Abstract: A system and method for sending and receiving data with a reliable communication protocol. The system includes a computer at a node having a backplane, a CPU board plugged into the backplane, software instructions for the CPU, and a special network board plugged into the backplane. The CPU board, software, and network card act to implement the TCP/IP protocol suite. The network card or board includes an interface to receive data packets from the physical layer, and circuitry to verify the TCP checksum before de-encapsulation and routing of the TCP segment by the network layer software. It also includes circuitry to automatically prepare the acknowledgement signal to be sent by the receiving computer to the sending computer. It additionally includes circuitry to calculate the error detecting code on outgoing signals from the sending computer to the receiving computer.
Type:
Grant
Filed:
October 30, 1997
Date of Patent:
September 19, 2000
Assignee:
TSI Telsys, Inc.
Inventors:
Toby D. Bennett, Donald J. Davis, Jonathan C. Harris, Ian D. Miller
Abstract: A programmable circuit assembly and methods for high bandwidth data processing. The assembly includes an array of in-circuit programmable logic packages interconnected with an array of memory packages, allowing for elastic buffering of data in a variety of directions. Each programmable package includes package leads, a memory, and output drivers. Each output driver is connected to a respective package lead, which is configured to generate a logic function defined by programming data stored in the memory. A method includes storing programming data for operating the assembly to send signals on different paths between a programmable package and a memory package.
Type:
Grant
Filed:
November 21, 1996
Date of Patent:
July 6, 1999
Assignee:
TSI TelSys Inc.
Inventors:
Toby D. Bennett, James W. Bishop, Donald J. Davis, Jonathan C. Harris