Abstract: An integrated circuit chip comprising: system circuitry comprising interconnect circuitry for transporting transactions; and monitoring circuitry configured to: monitor transactions from the interconnect circuitry comprising transactions between an entity and a specified region of the integrated circuit chip, the entity being associated with a set of one or more access rights for accessing the specified region of the integrated circuit chip; determine from the monitored transactions values of one or more parameters associated with the access to the specified region by the entity to identify whether the entity has breached its access rights; and perform a dedicated action indicative of a breach of the access rights in response to determining from the parameter values that the entity has breached its access rights.

Abstract: A method of reconfiguring a current debug configuration of a debug unit connected to a peripheral circuit on an integrated circuit chip. The method comprises the debug unit collecting debug data of the peripheral circuit and outputting the debug data in a message stream. The debug unit receives a debug reconfiguration command. The debug unit transmits an indication of the current debug configuration, then reconfigures the current debug configuration to a new debug configuration in accordance with the debug reconfiguration command, then transmits an indication of the new debug configuration. The indication of the current debug configuration and the indication of the new debug configuration are transmitted adjacent to the debug data in the message stream.

Abstract: A method of tracing transactions on an integrated circuit chip. The method comprises, for each transaction: extracting the transaction from interconnect circuitry of the integrated circuit chip, the transaction comprising an address signal and a data signal; applying a filtering condition to the address signal; only if the address signal does not fail the filtering condition, storing the address signal in an address trace buffer; storing the data signal in a data trace buffer; applying a triggering condition to the stored transaction; and outputting the stored transaction if the stored transaction matches the triggering condition.

Abstract: A communication device configured to communicate according to a data protocol in which data is carried in packets over a serial data link and the communication device is arranged: to form packets for transmission over the link in such a way that every packet commences with a first bit value; and between transmitting successive packets to continuously transmit a second bit value opposite to the first bit value over the link.

Abstract: A method of profiling transactions on an integrated circuit chip. The method comprises, for each transaction: extracting the transaction from interconnect circuitry of the integrated circuit chip; and filtering the transaction at a filtering circuit to determine which passband a parameter of the transaction lies within; sending an increment signal to a counter of a bank of counters, the counter having a counter value indicative of a number of transactions having the parameter lying within the passband; and outputting the counter values of the bank of counters.

Abstract: An integrated circuit chip comprising system circuitry and debugging circuitry. The system circuitry comprises a peripheral circuit. The debugging circuitry comprises a debug unit and a debug adapter. The debug unit is connected to the peripheral circuit. The debug adapter interfaces between the debug unit and a debug controller. The debug adapter is configured to receive a sequence of debug commands from the debug controller, each debug command instructing the debug unit to perform an action other than responding to a poll. In respect of each debug command, the debug adapter sends the debug command to the debug unit, and polls the debug unit to query whether the debug unit has performed the action instructed in that debug command.

Abstract: A method of reconfiguring a current debug configuration of a debug unit connected to a peripheral circuit on an integrated circuit chip. The method comprises the debug unit collecting debug data of the peripheral circuit and outputting the debug data in a message stream. The debug unit receives a debug reconfiguration command. The debug unit transmits an indication of the current debug configuration, then reconfigures the current debug configuration to a new debug configuration in accordance with the debug reconfiguration command, then transmits an indication of the new debug configuration. The indication of the current debug configuration and the indication of the new debug configuration are transmitted adjacent to the debug data in the message stream.

Abstract: A method of functionality testing system circuitry on an integrated circuit chip, the system circuitry comprising a plurality of sub-circuits and the integrated circuit chip further comprising debugging circuitry, the debugging circuitry comprising variability circuitry. The method comprises: at the system circuitry, performing a function by the sub-circuits performing concurrent actions; at the variability circuitry, altering relative timing of the concurrent actions so as to increase the likelihood of one or more errors in the system circuitry's performance of the function; and at the debugging circuitry, recording one or more errors in the system circuitry's performance of the function.

Abstract: An integrated circuit chip device comprising: system circuitry; debugging circuitry configured to debug the system circuitry, the debugging circuitry being segmented into zones; wherein the debugging circuitry comprises an interconnect fabric configured to route debug messages through a zone from a zone entry node of the interconnect fabric to a zone exit node of the interconnect fabric; and wherein the debugging circuitry is configured to, on receiving a debug message at a zone entry node that is shorter than a specified length, modify the debug message to form a modified debug message by increasing the length of the debug message to the specified length.

Abstract: A method of validating functional testing of system circuitry on an integrated circuit chip, the system circuitry configured to perform a plurality of functions, the integrated circuit chip further comprising debugging circuitry under the control of a debug controller, the debugging circuitry comprising at least one debug unit. The method comprises: at the system circuitry, performing one of the plurality of functions; applying a debug configuration to the at least one debug unit; and at the at least one debug unit, monitoring for a characteristic in the system circuitry's performance of the one of the plurality of functions according to that debug configuration, and reporting to the debug controller.

Abstract: A method of debugging a multiple concurrent processes comprising: obtaining, from each process, a plurality of events that have been processed and, if no time information is associated with each event, associating time information therewith; causing a display to display the events such that an event that has occurred in a first portion of the display associated with a first process at a first time is aligned with an event in a second portion of the display associated with a second process that has occurred at a similar time to the first time. To be accompanied, when published, by FIG. 5 of the drawings.

Abstract: A method of debugging a multiple concurrent processes comprising: obtaining, from each process, a plurality of events that have been processed and, if no time information is associated with each event, associating time information therewith; causing a display to display the events such that an event that has occurred in a first portion of the display associated with a first process at a first time is aligned with an event in a second portion of the display associated with a second process that has occurred at a similar time to the first time. To be accompanied, when published, by FIG. 5 of the drawings.