Abstract: A method and apparatus for manufacturing substrate based fan-out wafer level packaging is provided. The method includes providing a substrate, applying a first photoresist pattern, depositing copper or a copper alloy, applying a second photoresist pattern, forming chip attach site pillars by depositing a layer of copper or copper alloy, and attaching a semiconductor device via a flip chip bonding. The attaching includes forming a plurality of interconnect bumps between the semiconductor device and the chip attach site and forming a space between the semiconductor device and the substrate. The method further includes encapsulating the semiconductor device, thinning a second side of the substrate, applying a ball grid array pattern on the second side and etching the second side with copper, applying a solder mask coating, attaching a plurality of ball drops, and singulating a unit.

Abstract: A method is disclosed for manufacturing a discrete package for housing at least one integrated circuit die with electromagnetic interference shielding. The method may utilize a lead frame with a central die paddle and outwardly extending leads. The die paddle may have a top surface and an opposing bottom surface. The method may also have at least one integrated circuit die with a top surface and an opposing bottom surface. The integrated circuit die may be attached to the top surface of the die paddle. At least one conductive material bond may be established between the lead frame and the integrated circuit die. A dielectric material over mold may encapsulate the integrated circuit die and lead frame. A second dielectric material over mold may encapsulate the integrated circuit die and the lead frame. Further, a conductive coating may encapsulate the top and side surfaces of the package.

Abstract: A method and apparatus for manufacturing substrate based fan-out wafer level packaging is provided. The method includes providing a substrate, applying a first photoresist pattern, depositing copper or a copper alloy, applying a second photoresist pattern, forming chip attach site pillars by depositing a layer of copper or copper alloy, and attaching a semiconductor device via a flip chip bonding. The attaching includes forming a plurality of interconnect bumps between the semiconductor device and the chip attach site and forming a space between the semiconductor device and the substrate. The method further includes encapsulating the semiconductor device, thinning a second side of the substrate, applying a ball grid array pattern on the second side and etching the second side with copper, applying a solder mask coating, attaching a plurality of ball drops, and singulating a unit.

Abstract: A method and apparatus for manufacturing substrate based fan-out wafer level packaging is provided. The method includes providing a substrate, applying a first photoresist pattern, depositing copper or a copper alloy, applying a second photoresist pattern, forming chip attach site pillars by depositing a layer of copper or copper alloy, and attaching a semiconductor device via a flip chip bonding. The attaching includes forming a plurality of interconnect bumps between the semiconductor device and the chip attach site and forming a space between the semiconductor device and the substrate. The method further includes encapsulating the semiconductor device, grinding a second side of the substrate, applying a ball grid array pattern on the second side and etching the second side with copper, applying a solder mask coating, attaching a plurality of ball drops, and singulating a unit.

Abstract: A method and apparatus for manufacturing substrate based fan-out wafer level packaging is provided. The method includes providing a substrate, applying a first photoresist pattern, depositing copper or a copper alloy, applying a second photoresist pattern, forming chip attach site pillars by depositing a layer of copper or copper alloy, and attaching a semiconductor device via a flip chip bonding. The attaching includes forming a plurality of interconnect bumps between the semiconductor device and the chip attach site and forming a space between the semiconductor device and the substrate. The method further includes encapsulating the semiconductor device, thinning a second side of the substrate, applying a ball grid array pattern on the second side and etching the second side with copper, applying a solder mask coating, attaching a plurality of ball drops, and singulating a unit.

Abstract: A method of producing wettable fillets in electronic packages. A matrix of unsingulated lead frames is provided, each including a plurality of lead elements and a chip pad. Chips are attached to the chip pads and terminals on the chips are electrically connected to lead portions of the lead elements. The top portion of the package is encapsulated. Masking is applied to the bottom surface of the lead elements and the chip pads, but at least one of the lead elements has a portion of its surfaced remaining exposed. The exposed lead element surface is etched to create a fillet. The fillets, lead elements and bottom surface of the chip pads are plated, and the packages then singulated, producing packages with wettable flanks.

Abstract: A MEMS device for use in some embodiments in a microphone or pressure sensor and method of making the same wherein a portion of the package surrounding the acoustic port is deformed either away from, towards, or both away from and towards the interior of the package. By providing this raised area proximate the acoustic port, external debris is less likely to enter the acoustic port and damage the fragile MEMS die. Further, internal attachment material holding the MEMS die to the inside of the package is prevented by flowing into and obscuring the acoustic port. The advantages of this design include longer operation lifetimes for the MEMS device, greater design freedom, and increases in production yield.

Abstract: A method of producing wettable fillets in electronic packages. A matrix of unsingulated lead frames is provided, each including a plurality of lead elements and a chip pad. Chips are attached to the chip pads and terminals on the chips are electrically connected to lead portions of the lead elements. The top portion of the package is encapsulated. Masking is applied to the bottom surface of the lead elements and the chip pads, but at least one of the lead elements has a portion of its surfaced remaining exposed. The exposed lead element surface is etched to create a fillet. The fillets, lead elements and bottom surface of the chip pads are plated, and the packages then singulated, producing packages with wettable flanks.

Abstract: A method for the manufacture of a package encasing a Micro-Electro-Mechanical Systems (MEMS) device provides a cover having a lid and sidewalls with a port extending through the lid. A first base component is bonded to the sidewalls defining an internal cavity. This first base component further includes an aperture extending therethrough. The MEMS device is inserted through the aperture and bonded to the lid with the MEMS device at least partially overlapping the port. Assembly is completed by bonding a second base component to the first base component to seal the aperture. The package so formed has a cover with a lid, sidewalls and a port extending through the lid. A MEMS device is bonded to the lid and electrically interconnected to electrically conductive features disposed on the first base component. A second base component is bonded to the first base component spanning the aperture.

Abstract: A method for the manufacture of a package encasing a Micro-Electro-Mechanical Systems (MEMS) device provides a cover having a lid and sidewalls with a port extending through the lid. A first base component is bonded to the sidewalls defining an internal cavity. This first base component further includes an aperture extending therethrough. The MEMS device is inserted through the aperture and bonded to the lid with the MEMS device at least partially overlapping the port. Assembly is completed by bonding a second base component to the first base component to seal the aperture. The package so formed has a cover with a lid, sidewalls and a port extending through the lid. A MEMS device is bonded to the lid and electrically interconnected to electrically conductive features disposed on the first base component. A second base component is bonded to the first base component spanning the aperture.

Abstract: A method for the manufacture of a package encasing a Micro-Electro-Mechanical Systems (MEMS) device provides a cover having a lid and sidewalls with a port extending through the lid. A first base component is bonded to the sidewalls defining an internal cavity. This first base component further includes an aperture extending therethrough. The MEMS device is inserted through the aperture and bonded to the lid with the MEMS device at least partially overlapping the port. Assembly is completed by bonding a second base component to the first base component to seal the aperture. The package so formed has a cover with a lid, sidewalls and a port extending through the lid. A MEMS device is bonded to the lid and electrically interconnected to electrically conductive features disposed on the first base component. A second base component is bonded to the first base component spanning the aperture.

Abstract: A method for the manufacture of a package encasing a Micro-Electro-Mechanical Systems (MEMS) device provides a cover having a lid and sidewalls with a port extending through the lid. A first base component is bonded to the sidewalls defining an internal cavity. This first base component further includes an aperture extending therethrough. The MEMS device is inserted through the aperture and bonded said to the lid with the MEMS device at least partially overlapping the port. Assembly is completed by bonding a second base component to the first base component to seal the aperture. The package so formed has a cover with a lid, sidewalls and a port extending through the lid. A MEMS device is bonded to the lid and electrically interconnected to electrically conductive features disposed on the first base component. A second base component is bonded to the first base component spanning the aperture.

Abstract: A method for the manufacture of a package encasing a Micro-Electro-Mechanical Systems (MEMS) device provides a cover having a lid and sidewalls with a port extending through the lid. A first base component is bonded to the sidewalls defining an internal cavity. This first base component further includes an aperture extending therethrough. The MEMS device is inserted through the aperture and bonded said to the lid with the MEMS device at least partially overlapping the port. Assembly is completed by bonding a second base component to the first base component to seal the aperture. The package so formed has a cover with a lid, sidewalls and a port extending through the lid. A MEMS device is bonded to the lid and electrically interconnected to electrically conductive features disposed on the first base component. A second base component is bonded to the first base component spanning the aperture.

Abstract: A method for the manufacture of a package encasing a Micro-Electro-Mechanical Systems (MEMS) device provides a cover having a lid and sidewalls with a port extending through the lid. A first base component is bonded to the sidewalls defining an internal cavity. This first base component further includes an aperture extending therethrough. The MEMS device is inserted through the aperture and bonded to the lid with the MEMS device at least partially overlapping the port. Assembly is completed by bonding a second base component to the first base component to seal the aperture. The package so formed has a cover with a lid, sidewalls and a port extending through the lid. A MEMS device is bonded to the lid and electrically interconnected to electrically conductive features disposed on the first base component. A second base component is bonded to the first base component spanning the aperture.

Abstract: There is disclosed a method of making an electronic package (10) by: forming a metal base (50) on which to build the components of an electronic package; applying a mask layer (60) on the base to an area that is not to be occupied by interconnection pads (200) or die attachment pads (201) of the package; plating layers of metal on the un-masked areas of the base to form the interconnection and die attachment pads (200,201); removing the mask layer; mounting a semiconductor die (302) to at least one die attachment pad (201); electrically connecting the semiconductor die (302) to one or more interconnection pads (200); embedding the components on the base in an encapsulation material (300) to form a package; removing the metal base (50) to leave a package panel; and cutting the panel into discrete package units.