Patents Assigned to UTAC HEADQUARTERS PTE. LTD.
  • Publication number: 20240136217
    Abstract: A manufacturing system includes a substrate disposed on a conveyer system. The conveyer system includes a pair of side supports. The substrate is moved on the conveyer system until the substrate is disposed over a bottom support block. The bottom support block is raised to physically contact the substrate. A transfer arm module is provided. The transfer arm module includes a flat bottom surface and an opening formed in the flat bottom surface. The transfer arm module is disposed with the flat bottom surface physically contacting the substrate opposite the bottom support block. A vacuum is enabled through the opening of the transfer arm module. The substrate is lifted off the bottom support block using the vacuum. The substrate is moved over a printing pallet using the transfer arm module. The vacuum is disabled when the substrate is in a positioning area of the printing pallet.
    Type: Application
    Filed: October 18, 2023
    Publication date: April 25, 2024
    Applicant: UTAC Headquarters Pte. Ltd.
    Inventors: Hua Hong Tan, Chee Kay Chow, Zong Xiang Cai, Wei Ming Xian, Yao Hong Wu, Wing Keung Lam
  • Patent number: 11945004
    Abstract: A semiconductor manufacturing equipment cleaning system has a multi-station cleaning and inspection system. Within semiconductor manufacturing equipment cleaning system, a tray cleaning station uses a first rotating brush passing over a first surface of a carrier and possibly semiconductor die, and a second rotating brush passing over a second surface of the carrier and semiconductor die opposite the first surface of the carrier and semiconductor die. Debris and contaminants dislodged from the first surface and second surface of the carrier by the first rotating brush and second rotating brush are removed under vacuum suction. A conveyor transports the carrier through the multi-station cleaning and inspection system. The first rotating brush and second rotating brush move in tandem across the first surface and second surface of the carrier. Air pressure is injected across the first rotating brush and second rotating brush to further remove debris and contaminants.
    Type: Grant
    Filed: November 11, 2021
    Date of Patent: April 2, 2024
    Assignee: UTAC Headquarters Pte. Ltd.
    Inventors: Hua Hong Tan, Wing Keung Lam, Zong Xiang Cai, Wei Ming Xian, Yao Hong Wu, Tao Hu
  • Publication number: 20240055292
    Abstract: A first carrier has a first plate. A tape is disposed on the first plate. A second plate is disposed over the first plate. The second plate has a trench aligned to the tape and an opening formed through the second plate over the tape. A singulated semiconductor package is disposed on the tape in the opening of the second plate. A second carrier has a static datum and a movable datum. The movable datum is moved toward the static datum. An aperture substrate is disposed around the static datum and movable datum. A manufacturing process is performed on the aperture substrate.
    Type: Application
    Filed: August 11, 2023
    Publication date: February 15, 2024
    Applicant: UTAC Headquarters Pte. Ltd.
    Inventors: Roel Adeva Robles, Chee Kay Chow
  • Patent number: 11901308
    Abstract: The present disclosure is directed to improving EMI shielding to provide more reliable semiconductor packages. The semiconductor package may be, for example, a lead frame including one or multiple dies attached thereto. The semiconductor package may include only wire bonds or a combination of clip bonds and wire bonds. An integrated shielding structure may be disposed in between the package substrate and the encapsulant to shield internal and/or external EMI. For example, a top surface of the integrated shield structure is exposed.
    Type: Grant
    Filed: July 21, 2021
    Date of Patent: February 13, 2024
    Assignee: UTAC HEADQUARTERS PTE. LTD.
    Inventors: Saravuth Sirinorakul, Il Kwon Shim, Kok Chuen Lock, Roel Adeva Robles, Eakkasit Dumsong
  • Patent number: 11881494
    Abstract: A semiconductor package and a method of manufacturing thereof is disclosed. The package includes a package substrate having a die attach region with a die attached thereto. A protective cover is disposed over a sensor region of the die and attached to the die by a cover adhesive. The package includes a dam structure configured to protect components of the semiconductor package from contamination.
    Type: Grant
    Filed: September 20, 2021
    Date of Patent: January 23, 2024
    Assignee: UTAC HEADQUARTERS PTE. LTD.
    Inventors: Jeffrey Punzalan, Il Kwon Shim
  • Publication number: 20240003768
    Abstract: A semiconductor device has a substrate and a first electrical component including a sensing region disposed over the substrate. The sensing region can be responsive to external stimuli, such as pressure. A cover lid is disposed over the first electrical component and extending to the substrate with an opening in the cover lid aligned over the sensing region. A gel material is disposed within the opening of the cover lid to seal the sensing region with respect to an environment condition, such as liquid. A bond wire is coupled between the first electrical component and substrate. An adhesive layer is disposed around a perimeter of the sensing area and the cover lid is bonded to the adhesive layer. A second electrical component is disposed on the substrate and the first electrical component is disposed on the second electrical component.
    Type: Application
    Filed: June 14, 2023
    Publication date: January 4, 2024
    Applicant: UTAC Headquarters Pte. Ltd.
    Inventors: Paweena Phatto, Maythichai Saithong, Eakkasit Dumsong, Jiraphat Charoenratpratoom
  • Patent number: 11804416
    Abstract: A semiconductor device has a semiconductor die with a sensor and a cavity formed into a first surface of the semiconductor die to provide access to the sensor. A protective layer is formed on the first surface of the semiconductor die around the cavity. An encapsulant is deposited around the semiconductor die. The protective layer blocks the encapsulant from entering the cavity. With the cavity clear of encapsulant, liquid or gas has unobstructed entry into cavity during operation of the semiconductor die. The clear entry for the cavity provides reliable sensor detection and measurement. The semiconductor die is disposed over a leadframe. The semiconductor die has a sensor. The protective layer can be a film. The protective layer can have a beveled surface. A surface of the leadframe can be exposed from the encapsulant. A second surface of the semiconductor die can be exposed from the encapsulant.
    Type: Grant
    Filed: August 6, 2021
    Date of Patent: October 31, 2023
    Assignee: UTAC Headquarters Pte. Ltd.
    Inventors: Saravuth Sirinorakul, Preecha Joymak, Natawat Kasikornrungroj, Wasu Aingkaew, Kawin Saiubol, Thanawat Jaengkrajarng
  • Publication number: 20230343668
    Abstract: A semiconductor device has a substrate and a first insulating layer formed over a first major surface of the substrate. A first redistribution layer is formed over the first insulating layer. A second insulating layer is formed over the first redistribution layer. A second redistribution layer can be formed over the second insulating layer, and a third insulating layer can be formed over the second redistribution layer. A protection layer is formed over a second major surface of the substrate for warpage control. A conductive layer is formed over the first redistribution layer, and a bump is formed over the conductive layer. An under bump metallization can be formed under the bump. The protection layer extends over a side surface of the substrate between the first major surface and second major surface. The protection layer further extends over a side surface of the first insulating layer.
    Type: Application
    Filed: April 18, 2023
    Publication date: October 26, 2023
    Applicant: UTAC Headquarters Pte. Ltd.
    Inventors: Il Kwon Shim, Ronnie M. De Villa, Dzafir Bin Mohd Shariff
  • Patent number: 11784102
    Abstract: A semiconductor package and method for forming thereof are disclosed. The package includes a package substrate having a die cavity with a die attached therein. The package substrate also includes a cavity for bonding a cap thereto to form a hermetic package. The cap is bonded to the cavity using sealing rings.
    Type: Grant
    Filed: July 29, 2021
    Date of Patent: October 10, 2023
    Assignee: UTAC Headquarters Pte. Ltd.
    Inventors: Eakkasit Dumsong, Mike Jayson Candelario, Phongsak Sawasdee, Jiraphat Charoenratpratoom, Paweena Phatto, Maythichai Saithong
  • Patent number: 11710681
    Abstract: An embodiment related to a device. The device includes a first die with first and second die surfaces. The second die surface is bonded to a first die attach pad (DAP) disposed on a first substrate surface of a package substrate and the first die surface includes a first die contact pad. The device also includes a first clip bond including a first clip bond horizontal planar portion attached to the first die contact pad on the first die surface, and a first clip bond vertical portion disposed on an edge of the first clip bond horizontal planar portion. The first clip bond vertical portion is attached to a first substrate bond pad on the first substrate surface. The device further includes a first conductive clip-die bonding layer with spacers on the first die contact pad of the first die.
    Type: Grant
    Filed: October 6, 2021
    Date of Patent: July 25, 2023
    Assignee: UTAC Headquarters Pte. Ltd.
    Inventors: Tanawan Chaowasakoo, Hua Hong Tan, Alexander Lucero Laylo, Thanawat Jaengkrajarng
  • Patent number: 11710661
    Abstract: A semiconductor package is disclosed. The semiconductor package includes a substrate with a first surface, a second surface and sidewalls. The package also includes backside metallization (BSM) over the second surface of the substrate. The semiconductor package is devoid of metal debris.
    Type: Grant
    Filed: October 15, 2020
    Date of Patent: July 25, 2023
    Assignee: UTAC Headquarters Pte. Ltd
    Inventors: Enrique Jr Sarile, Dzafir Bin Mohd Shariff, Seung Geun Park, Ronnie M. De Villa, Zhong Hai Wang
  • Publication number: 20230192478
    Abstract: A semiconductor device includes a substrate. A first semiconductor die including a microelectromechanical system (MEMS) is disposed over the substrate. A lid is disposed on the substrate around the first semiconductor die. A first encapsulant is deposited over the substrate and lid. A second encapsulant is deposited into the lid.
    Type: Application
    Filed: November 23, 2022
    Publication date: June 22, 2023
    Applicant: UTAC Headquarters Pte. Ltd.
    Inventor: Phongsak Sawasdee
  • Patent number: 11676934
    Abstract: The present disclosure is directed to a high throughput clip bonding tool or system which is flexible and easily adapts to different clip bond pitches or sizes. The clip bonding system may be an integrated system with various modules, including a clip singulation module, a feeder module, a transfer module and a clip attach module within a shared footprint. For example, an incoming clip source may be fed to the clip singulation module for clip singulation before the singulated clips are transferred by the feeder and transfer modules to a clip presentation area for clip alignment before pickup. A pickup tool of the clip attach module is configured to facilitate pickup and attachment of clips onto the semiconductor packages to be clip bonded. For example, the pickup head is programmable to facilitate clip bonding process of different applications which may require clips and packages with different sizes.
    Type: Grant
    Filed: October 22, 2020
    Date of Patent: June 13, 2023
    Assignee: UTAC Headquarters Pte. Ltd.
    Inventors: Albert Louis Bove, Hua Hong Tan, Aaron Lyn Foong Tan
  • Patent number: 11670549
    Abstract: A semiconductor package which is free of metal debris from backside metallization (BSM) is disclosed. The semiconductor package is singulated by performing a saw street open process from the frontside of the wafer and then includes a singulation process using a plasma etch from the backside of the wafer with BSM. The singulation process results in metal debris free packages.
    Type: Grant
    Filed: December 17, 2020
    Date of Patent: June 6, 2023
    Assignee: UTAC Headquarters Pte Ltd
    Inventors: Dzafir Bin Mohd Shariff, Enrique Jr Sarile, Seung Geun Park
  • Patent number: 11670521
    Abstract: A method for forming a semiconductor package is disclosed. The method includes providing a package substrate having a die attach region with a die attached thereto. A protective cover is disposed over a sensor region of the die and attached to the die by a cover adhesive. The protective cover is supported by a standoff structure disposed on the die and below the protective cover. An encapsulant is disposed to cover the package substrate while leaving the top package surface exposed.
    Type: Grant
    Filed: December 17, 2020
    Date of Patent: June 6, 2023
    Assignee: UTAC Headquarters Pte. Ltd
    Inventors: Il Kwon Shim, Jeffrey Punzalan
  • Publication number: 20230058682
    Abstract: A semiconductor manufacturing equipment cleaning system has a multi-station cleaning and inspection system. Within semiconductor manufacturing equipment cleaning system, a tray cleaning station uses a first rotating brush passing over a first surface of a carrier and possibly semiconductor die, and a second rotating brush passing over a second surface of the carrier and semiconductor die opposite the first surface of the carrier and semiconductor die. Debris and contaminants dislodged from the first surface and second surface of the carrier by the first rotating brush and second rotating brush are removed under vacuum suction. A conveyor transports the carrier through the multi-station cleaning and inspection system. The first rotating brush and second rotating brush move in tandem across the first surface and second surface of the carrier. Air pressure is injected across the first rotating brush and second rotating brush to further remove debris and contaminants.
    Type: Application
    Filed: November 11, 2021
    Publication date: February 23, 2023
    Applicant: UTAC Headquarters Pte. Ltd.
    Inventors: Hua Hong Tan, Wing Keung Lam, Zong Xiang Cai, Wei Ming Xian, Yao Hong Wu, Tao Hu
  • Publication number: 20230036239
    Abstract: A semiconductor device has a substrate. A semiconductor die with a photosensitive circuit is disposed over the substrate. A lens comprising a protective layer is disposed over the photosensitive circuit. An encapsulant is deposited over the substrate, semiconductor die, and lens. The protective layer is removed after depositing the encapsulant.
    Type: Application
    Filed: July 25, 2022
    Publication date: February 2, 2023
    Applicant: UTAC Headquarters Pte. Ltd.
    Inventors: Emmanuel Espiritu, Il Kwon Shim, Jeffrey Punzalan, Jose Mari Casticimo
  • Publication number: 20220390510
    Abstract: An illuminator system for semiconductor chip testing has a rotary plate and a first light source and second light source mounted on the rotary plate. A controller is configured to rotate the rotary plate to provide a desired light output. A light output of the illuminator system is aligned to the desired first or second light source. A first semiconductor chip receives illumination from the desired source. The rotary plate is rotated until the desired light source is aligned to the light output. A quality or characteristic of light emitted by the first light source can be measured, and then the first light source can be adjusted, or an alert can be generated, if the quality or characteristic falls outside of a preconfigured range.
    Type: Application
    Filed: June 3, 2022
    Publication date: December 8, 2022
    Applicants: UTAC Headquarters Pte. Ltd., AEM SINGAPORE Pte Ltd
    Inventors: Boon Chew Goh, Jeffery Yap Chee Howe, Fatt Chye Low, Gilbert Eng Liang Goh, Seong Liang Lim, Kian Heng Ang, Zuping Chen
  • Publication number: 20220384505
    Abstract: A semiconductor device has a substrate. A semiconductor die including a photosensitive circuit is disposed over the substrate. A shield is disposed over the substrate and semiconductor die with a first opening of the shield disposed over the photosensitive circuit. An outer section of the shield is attached to the substrate and includes a second opening. An encapsulant is deposited over the substrate and semiconductor die. The encapsulant extends into the first opening and a first area between the shield and substrate while a second area over the photosensitive circuit remains devoid of the encapsulant.
    Type: Application
    Filed: May 23, 2022
    Publication date: December 1, 2022
    Applicant: UTAC Headquarters Pte. Ltd.
    Inventors: Emmanuel Espiritu, Il Kwon Shim, Jeffrey Punzalan, Teddy Joaquin Carreon
  • Publication number: 20220320033
    Abstract: A semiconductor device has a substrate with a die mounting site and a plurality of leads. A first electrical component is disposed over a first surface of the die mounting site. A second electrical component is disposed over a second surface of the die mounting site opposite the first surface of the die mounting site. A first bond wire is coupled between the first electrical component and a first lead, and a second bond wire is coupled between the second electrical component and a second lead. A first encapsulant is deposited over the first electrical component, and a second encapsulant is deposited over the second electrical component with the leads exposed between the first encapsulant and second encapsulant. The leads are exposed from the first encapsulant and second encapsulant on a side of the semiconductor device.
    Type: Application
    Filed: March 25, 2022
    Publication date: October 6, 2022
    Applicant: UTAC Headquarters Pte. Ltd.
    Inventors: Krit Pajuvang, Siriwanna Ounkaew