Patents Assigned to VANGUARD INTERNATIONAL SEMICONDUCTOR SINGAPORE PTE. LTD.
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Patent number: 11963452Abstract: A method of forming a piezoelectric microphone with an interlock/stopper and a micro-bump and a resulting device are provided. Embodiments include forming a membrane over a Si substrate having a first and second sacrificial layer disposed on opposite surfaces thereof, the membrane being formed on the first sacrificial layer, forming a first HM over the membrane, forming first and second vias through the first HM, forming a first pad layer in the first and second vias and over an exposed top thin film, forming a trench to the first sacrificial layer between the first and second vias and a gap between the trench and second via, patterning a second HM over the membrane, in the first and second vias, the trench and the gap, and forming a second pad layer over the second HM and in exposed areas around the first and second vias to form pad structures.Type: GrantFiled: November 24, 2020Date of Patent: April 16, 2024Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR SINGAPORE PTE. LTD.Inventors: Jia Jie Xia, Rakesh Kumar, Minu Prabhachandran Nair, Nagarajan Ranganathan
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Patent number: 11813639Abstract: Provided in accordance with the herein described exemplary embodiments are piezo micro-machined ultrasonic transducers (pMUTs) each having a first electrode that includes a first electrode portion and a second electrode portion. The second electrode portion is separately operable from the first electrode portion. A second electrode is spaced apart from the first electrode and defines a space between the first electrode and the second electrode. A piezoelectric material is disposed in the space. Also provided are arrays of pMUTs wherein individual pMUTs have first electrode portions operably associated with array rows and second electrode portions operably associated with array columns.Type: GrantFiled: September 28, 2016Date of Patent: November 14, 2023Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR SINGAPORE PTE. LTD.Inventors: Aveek Nath Chatterjee, Rakesh Kumar, Jaime Viegas, Mateusz Tomasz Madzik
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Patent number: 11785852Abstract: A method of forming a microphone device includes: forming a through-hole in a substrate wafer; providing a second wafer; bonding the second wafer to the substrate wafer; and forming a top electrode over a first surface of a single-crystal piezoelectric film of the second wafer. The second wafer may include the single-crystal piezoelectric film. The single-crystal piezoelectric film may have a first surface and an opposing second surface. The second wafer may further include a bottom electrode arranged adjacent to the second surface, and a support member over the single-crystal piezoelectric film. The through-hole in substrate wafer may be at least substantially aligned with at least one of the top electrode and the bottom electrode.Type: GrantFiled: November 3, 2022Date of Patent: October 10, 2023Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR SINGAPORE PTE. LTD.Inventors: You Qian, Joan Josep Giner De Haro, Rakesh Kumar
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Patent number: 11767217Abstract: A method of forming a MEMS device includes providing a substrate having a device stopper. The device stopper is integral to the substrate and formed of the substrate material. A thermal dielectric isolation layer may be arranged over the device stopper and the substrate. A device cavity may be formed in the substrate and the thermal dielectric isolation layer. The thermal dielectric isolation layer and the device stopper at least partially surround the device cavity. An active device layer may be formed over the thermal dielectric isolation layer and the device cavity.Type: GrantFiled: January 23, 2022Date of Patent: September 26, 2023Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR SINGAPORE PTE. LTD.Inventors: Ranganathan Nagarajan, Jia Jie Xia, Rakesh Kumar, Bevita Kallupalathinkal Chandran
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Publication number: 20230051656Abstract: A method of forming a microphone device includes: forming a through-hole in a substrate wafer; providing a second wafer; bonding the second wafer to the substrate wafer; and forming a top electrode over a first surface of a single-crystal piezoelectric film of the second wafer. The second wafer may include the single-crystal piezoelectric film. The single-crystal piezoelectric film may have a first surface and an opposing second surface. The second wafer may further include a bottom electrode arranged adjacent to the second surface, and a support member over the single-crystal piezoelectric film. The through-hole in substrate wafer may be at least substantially aligned with at least one of the top electrode and the bottom electrode.Type: ApplicationFiled: November 3, 2022Publication date: February 16, 2023Applicant: VANGUARD INTERNATIONAL SEMICONDUCTOR SINGAPORE PTE. LTD.Inventors: You QIAN, Joan Josep GINER DE HARO, Rakesh KUMAR
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Patent number: 11575081Abstract: A MEMS structure may include a substrate, a first metal layer arranged over the substrate, an aluminum nitride layer at least partially arranged over the first metal layer and a second metal layer including one or more patterns arranged over the aluminum nitride layer. The first metal layer may include an electrode area configured for external electrical connection and one or more isolated areas configured to be electrically isolated from the electrode area and further configured to be electrically isolated from external electrical connection. Each pattern of the second metal layer may be arranged to at least partially overlap with one of the isolated area(s) of the first metal layer.Type: GrantFiled: November 26, 2019Date of Patent: February 7, 2023Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR SINGAPORE PTE. LTD.Inventors: Bevita Kallupalathinkal Chandran, Jia Jie Xia, Tze Sheong Neoh
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Shear-mode chemical/physical sensor for liquid environment sensing and method for producing the same
Patent number: 11549913Abstract: Methods of forming a shear-mode chemical/physical sensor for liquid environment sensing on V-shaped grooves of a [100] crystal orientation Si layer and the resulting devices are provided. Embodiments include forming a set of V-shaped grooves in a [100] Si layer over a substrate; forming an acoustic resonator over and along the V-shaped grooves, the acoustic resonator including a first metal layer, a thin-film piezoelectric layer, and a second metal layer in an IDT pattern or a sheet; and forming at least one functional layer along a slope of the acoustic resonator.Type: GrantFiled: May 10, 2018Date of Patent: January 10, 2023Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR SINGAPORE PTE. LTD.Inventors: Humberto Campanella-Pineda, You Qian, Vibhor Jain, Anthony Stamper, Rakesh Kumar -
Patent number: 11527700Abstract: A microphone device may include: a substrate wafer, a support member bonded to a front surface of the substrate wafer, a single-crystal piezoelectric film provided over the support member, a top electrode and a bottom electrode. The single-crystal piezoelectric film may have a first surface and an opposing second surface. The top electrode may be arranged adjacent to the first surface of the single-crystal piezoelectric film. The bottom electrode may be arranged adjacent to the second surface of the single-crystal piezoelectric film. The substrate wafer may have a through-hole formed therein. The through-hole of the substrate wafer may be at least substantially aligned with at least one of the top electrode and the bottom electrode.Type: GrantFiled: December 20, 2019Date of Patent: December 13, 2022Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR SINGAPORE PTE. LTD.Inventors: You Qian, Joan Josep Giner De Haro, Rakesh Kumar
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Publication number: 20220144625Abstract: A method of forming a MEMS device includes providing a substrate having a device stopper. The device stopper is integral to the substrate and formed of the substrate material. A thermal dielectric isolation layer may be arranged over the device stopper and the substrate. A device cavity may be formed in the substrate and the thermal dielectric isolation layer. The thermal dielectric isolation layer and the device stopper at least partially surround the device cavity. An active device layer may be formed over the thermal dielectric isolation layer and the device cavity.Type: ApplicationFiled: January 23, 2022Publication date: May 12, 2022Applicant: VANGUARD INTERNATIONAL SEMICONDUCTOR SINGAPORE PTE. LTD.Inventors: Ranganathan NAGARAJAN, Jia Jie Xia, RAKESH KUMAR, Bevita KALLUPALATHINKAL CHANDRAN
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Patent number: 11329098Abstract: According to various embodiments, a PMUT device may include a wafer, an active layer including a piezoelectric stack, an intermediate layer having a cavity therein where the intermediate layer is disposed between the wafer and the active layer such that the cavity is adjoining the piezoelectric stack. A via may be formed through the active layer and the intermediate layer to the wafer. A metallic layer may be disposed over the active layer and over surfaces of the via. The intermediate layer may include an interposing material surrounding the cavity, and may further include a sacrificial material surrounding the via. The sacrificial material may be different from the interposing material. The metallic layer may include a first member at least substantially overlapping the piezoelectric stack, a second member extending from the first member to the cavity, and a third member extending into the active layer to contact an electrode therein.Type: GrantFiled: November 8, 2018Date of Patent: May 10, 2022Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR SINGAPORE PTE. LTD.Inventors: You Qian, Humberto Campanella-Pineda, Rakesh Kumar
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Publication number: 20220103153Abstract: Method of designing a BAW resonator and filter and the resulting devices are provided. Embodiments include patterning a bottom electrode of a resonator, patterning a top electrode of the resonator, and intersecting area of the resonator, wherein the effective area includes a closed-loop contour line including a pulse function pattern with predefined amplitude, period and a number of repetitions of pulses along the closed-loop contour line.Type: ApplicationFiled: December 13, 2021Publication date: March 31, 2022Applicant: VANGUARD INTERNATIONAL SEMICONDUCTOR SINGAPORE PTE. LTD.Inventors: You Qian, Humberto CAMPANELLA PINEDA, RAKESH KUMAR
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Patent number: 11286157Abstract: A method for packaging a MEMS device includes the following steps. A metal cap is provided that is partially anchored to a wafer comprising the MEMS device where at least one point between the cap and the wafer is unanchored, the metal cap arranged to at least substantially extend over the MEMS device. An electrical contact pad is electrically coupled to the MEMS device. A sealing layer is provided over the metal cap and the wafer such that the sealing layer seals a gap between an unanchored portion of the metal cap and the wafer to encapsulate the MEMS device, where the electrical contact pad and the metal cap include the same composition.Type: GrantFiled: August 31, 2020Date of Patent: March 29, 2022Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR SINGAPORE PTE. LTD.Inventors: You Qian, Humberto Campanella Pineda, Rakesh Kumar
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Patent number: 11233496Abstract: Methods of designing a BAW resonator and filter and the resulting devices are provided. Embodiments include patterning a bottom electrode of a resonator; patterning a top electrode of the resonator; and intersecting areas of the top and bottom electrodes to provide an effective area of the resonator, wherein the effective area includes a closed-loop contour line including a pulse function pattern with pre-defined amplitude, period and a number of repetitions of pulses along the closed-loop contour line.Type: GrantFiled: February 21, 2018Date of Patent: January 25, 2022Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR SINGAPORE PTE. LTD.Inventors: You Qian, Humberto Campanella Pineda, Rakesh Kumar
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Patent number: 10988376Abstract: A method of forming a monolithic integrated PMUT and CMOS with a coplanar elastic, sealing, and passivation layer in a single step without bonding and the resulting device are provided. Embodiments include providing a CMOS wafer with a metal layer; forming a dielectric over the CMOS; forming a sacrificial structure in a portion of the dielectric; forming a bottom electrode; forming a piezoelectric layer over the CMOS; forming a top electrode over portions of the bottom electrode and piezoelectric layer; forming a via through the top electrode down to the bottom electrode and a second via down to the metal layer through the top electrode; forming a second metal layer over and along sidewalls of the first and second via; removing the sacrificial structure, an open cavity formed; and forming a dielectric layer over a portion of the CMOS, the open cavity sealed and an elastic layer and passivation formed.Type: GrantFiled: December 13, 2017Date of Patent: April 27, 2021Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR SINGAPORE PTE. LTD.Inventors: You Qian, Humberto Campanella-Pineda, Rakesh Kumar
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Patent number: 10892730Abstract: A BAW resonator/filter with a monolithic TFE package that defines an acoustic BC and suppresses resonances from the low-Q piezoelectric area of the resonator and resulting devices are provided. Embodiments include a BAW resonator over a dielectric layer, the BAW resonator including a first metal layer, a thin-film piezoelectric layer, and a second metal layer; a first cavity in the dielectric layer under the first metal layer and a second cavity over the first cavity on the second metal layer; and a pair of TFE anchors on the second metal layer, each TFE anchor adjacent to and on an opposite side of the second cavity and extending beyond the first metal layer.Type: GrantFiled: May 30, 2018Date of Patent: January 12, 2021Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR SINGAPORE PTE. LTD.Inventors: You Qian, Humberto Campanella-Pineda, Rakesh Kumar
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Patent number: 10886455Abstract: A method of forming a piezoelectric microphone with an interlock/stopper and a micro-bump and a resulting device are provided. Embodiments include forming a membrane over a Si substrate having a first and second sacrificial layer disposed on opposite surfaces thereof, the membrane being formed on the first sacrificial layer, forming a first HM over the membrane, forming first and second vias through the first HM, forming a first pad layer in the first and second vias and over an exposed top thin film, forming a trench to the first sacrificial layer between the first and second vias and a gap between the trench and second via, patterning a second HM over the membrane, in the first and second vias, the trench and the gap, and forming a second pad layer over the second HM and in exposed areas around the first and second vias to form pad structures.Type: GrantFiled: July 31, 2017Date of Patent: January 5, 2021Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR SINGAPORE PTE. LTD.Inventors: Jia Jie Xia, Rakesh Kumar, Minu Prabhachandran Nair, Nagarajan Ranganathan
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Patent number: 10811361Abstract: The present disclosure relates to semiconductor structures and, more particularly, to seal ring structures with channels and methods of manufacture. The structure includes: a first wafer having a channel formed within a passivation layer; a second wafer having a protuberance which is insertable into the channel and which is bonded to the first wafer with eutectic bonding materials; and a plurality of stoppers or tabs extending within the channel and which provides a gap that has a dimension smaller than a gap formed in other portions of the channel.Type: GrantFiled: June 12, 2018Date of Patent: October 20, 2020Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR SINGAPORE PTE. LTD.Inventors: Lieneng Low, Teck Wee Christopher Lim, Wai Mun Chong, Wan Tak Ng
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Patent number: 10793421Abstract: A microelectromechanical system (MEMS) device is disclosed. The MEMS device includes a device substrate having a MEMS component in a device region. A top cap is fusion bonded to the top surface of the device substrate and a bottom cap is fusion bonded to the bottom surface of the device substrate. The top and bottom caps encapsulate the MEMS components. A cap includes a via isolation which extends a thickness of the cap and surrounds the device region.Type: GrantFiled: November 13, 2017Date of Patent: October 6, 2020Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR SINGAPORE PTE. LTD.Inventors: Natarajan Rajasekaran, Siddharth Chakravarty, Yu Ting Ng, Rakesh Kumar, Pradeep Yelehanka
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Patent number: 10793422Abstract: A microelectromechanical systems (MEMS) package may include a wafer having a MEMS device; a metal cap partially anchored to the wafer where at least one point between the cap and the wafer is unanchored, the metal cap at least substantially extending over the MEMS device; an electrical contact pad electrically coupled to the MEMS device; and a sealing layer disposed over the metal cap and the wafer, such that the sealing layer seals a gap between an unanchored portion of the metal cap and the wafer to encapsulate the MEMS device; wherein the electrical contact pad and the metal cap include the same composition.Type: GrantFiled: December 17, 2018Date of Patent: October 6, 2020Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR SINGAPORE PTE. LTD.Inventors: You Qian, Humberto Campanella Pineda, Rakesh Kumar
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Patent number: 10784833Abstract: A method for forming a lamb acoustic wave resonator and filter and the resulting device are provided. Embodiments include forming a sacrificial layer over a substrate; forming a first electrode over the sacrificial layer; forming a piezoelectric thin film over the first electrode; forming a second electrode over the piezoelectric thin film; forming a hardmask over the second electrode; etching through the hardmask and the second electrode down to the piezoelectric thin film forming self-aligned vias; forming and patterning a photoresist layer over the self-aligned vias; etching through the photoresist layer forming cavities extending through the vias and to the sacrificial layer; and removing the sacrificial layer forming a cavity gap under the cavities and first metal electrode.Type: GrantFiled: April 4, 2017Date of Patent: September 22, 2020Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR SINGAPORE PTE. LTD.Inventors: Humberto Campanella Pineda, Anthony Kendall Stamper, Jeffrey C. Maling, Sharath Poikayil Satheesh, You Qian, Rakesh Kumar