Abstract: At a high level, aspects of the present disclosure are directed to systems and methods for providing NFT access to a user. In an embodiment, an NFT integrated device may be configured to provide access to an NFT linked to a physical asset to a user through a digital tag.

Abstract: A method of providing improved accuracy of the calculation of the long-term average arrival rate (AAR) of an ATM packet stream is disclosed. Using this method, accurate synchronization of a receiver clock to a network clock is achieved. The invention measures the variable time interval, T, required to complete the arrival of a known and fixed number of data packets, C. Using a predetermined and relatively large number of data packets, a time interval measurement is accurately measured to very precise values. Because the time interval measurement is triggered precisely by the arrival of the first data packet to the complete arrival of the last data packet in the session, there is no quantization error with respect to the first and last data packet. AAR is then calculated as (C*S)/T, where S is the number of samples per data packet.

Abstract: A network controller card having a processor, memory and program logic. The program logic can be used as communications circuits and as testing circuits. A reconfigure signal from a workstation remotely located from the network controller card initiates the processor to change the program logic from communications circuits to testing circuits and vice versa.

Abstract: A network controller card having a processor, memory and program logic. The program logic can be used as communications circuits and as testing circuits. A reconfigure signal from a workstation remotely located from the network controller card initiates the processor to change the program logic from communications circuits to testing circuits and vice versa.

Abstract: A retrofit circuit for communication one of three conditions from a line interface unit (LIU) to a receiver unit (RU), using only one external connection between the LIU and the RU. The LIU has a detection circuit and two resistors. The RU has a voltage comparator. The detection circuit outputs a first input signal in response to a signal having ESF and no yellow alarm, a second input signal in response to a signal having ESF and yellow alarm, a third input signal in response to a signal having SF with no yellow alarm, and a fourth input signal in response to a signal having SF with yellow alarm. The resistors output to the external connection a first voltage level in response to the first and third input signals, a second voltage level in response to the second and third input signals, and a third voltage level in response to the second and fourth input signals.

Abstract: A dual-framing-bit-alignment apparatus having a communications channel, a data device, an encryptor, a framing-bit device, a decryptor, a first framing-bit repositioner, and a second framing-bit repositioner. The first data device generates a first data-bit sequence having a first framing-bit sequence. The encryptor encrypts the first data-bit sequence as an encrypted-bit sequence. The framing-bit device substitutes on the encrypted-bit sequence, a second framing-bit sequence, thereby generating a framed-encrypted-bit sequence. The decryptor decrypts the framed-encryped-bit sequence as a second data-bit sequence. The second data-bit sequence contains errors due to the second framing-bit sequence. A second framing-bit repositioner detects in the second data-bit sequence, the first framing-bit sequence and the errors. In response to detecting the errors and the first framing-bit sequence, the first framing-bit repositioner aligns the first framing-bit sequence with the second framing-bit sequence.

Abstract: A ciphertext to plaintext communications system including a communications channel, a generator, a data device, an encryptor, a black to red communicator (BRC) device, a decryptor, and a comparator. The generator generates a first data-bit sequence which has a predetermined bit pattern. The encryptor encrypts the first data-bit sequence as an encrypted-bit sequence. The encrypted-bit sequence is transmitted over the communications channel and received by the BRC device. The data device generates the second data-bit sequence, which may include data from diagnostic equipment or any other source of information originating in the channel carrying the encrypted-bit sequence. The BRC device modifies the encrypted-bit sequence using the second data-bit sequence. The decryptor decrypts the modified-encrypted-bit sequence as a third data-bit sequence. The third data-bit sequence is compared with the predetermined bit pattern with the comparator, which thereby generates the second data-bit sequence.

Abstract: An interface apparatus utilizing data encoding/decoding methods having particular application for use in interfacing data processing and telecommunication equipment is disclosed. The interface apparatus includes an encoder for encoding inputted data for transmission on a telecommunication system, and a decoder to receive the encoded data and decode the data stream such that it identically represents data originally provided to the encoder. The present invention detects channels in the inputted data which contain a predetermined value of bits, and stores the channel numbers of these detected channels in digital storage means. These detected channels are then deleted from the data stream, and the remaining inputted data in each of the data channels is shifted such that data previously located in the first data channel is inserted in the data channel offset by the number of channels stored in the storage means.