Abstract: A programmable look-up-table (LUT) structure adapted for carry logic incrementer implementation in an integrated circuit, comprising: three or more data inputs and a carry-in input, said data inputs comprised of consecutive bits in a data string, said carry-in comprised of the increment value to the least order bit of said data string; and three or more data outputs and a carry-out output, said data outputs comprised of the incremented values of said data inputs, and said carry-out resulting from the incremented value of the highest order bit of said data inputs; wherein, said three or more data outputs are computed in a single carry computation stage within the LUT structure.

Abstract: A method of fabricating a field programmable integrated circuit comprised of: constructing a semiconductor device comprising a fuse circuit to customize the logic content of a programmable logic circuit; and attaching said semiconductor device in a detachable lid package, wherein the fuses are customized in the field by detaching the lid and blowing one or more fuse elements. The said method further comprised of: providing a custom hard-wire pattern in lieu of the fuse circuit, wherein the programmable logic circuit timing is identical between the fuse circuit and hard-wire options.