Abstract: A microwave transistor structure comprising: (1) a substrate having a top surface; (2) a silicon semiconductor material of a first conductivity type, having a first dopant concentration and a top surface; (3) a conductive gate overlying and insulated from the top surface of the silicon semiconductor material; (4) a channel region of a second conductivity type and having a channel dopant concentration; (5) a drain region of the second conductivity type and having a drain dopant concentration greater than the channel region dopant concentration; (6) a body of the first conductivity type and having a body region dopant concentration; (7) a source region of the second conductivity type and having a source region dopant concentration; (8) a shield plate region formed on the top surface of the silicon semiconductor material over a portion of the channel region, wherein the shield plate is adjacent and parallel to the drain region, and to the conductive gate region; and wherein the shield plate extends above the top

Abstract: The present invention discloses and claims the silicon carbide based silicon structure comprising: (1) a silicon carbide substrate, (2) a silicon semiconductor material having a top surface, and either bonded to the silicon carbide substrate via the bonding layer, or epitaxially grown on the silicon carbide substrate; and (3) at least one separation plug formed in the silicon semiconductor material. The separation plug extends from the top surface of the silicon semiconductor material into the silicon carbide substrate at a separation plug depth level, and is configured to block the coupling between at least two adjacent active/passive structures formed in the silicon semiconductor material.

Abstract: A lateral RF MOS transistor with at least one conductive plug structure comprising: (1) a semiconductor material of a first conductivity type having a first dopant concentration and a top surface; (2) a conductive gate overlying and insulated from the top surface of the semiconductor material; (3) at least two enhanced drain drift regions of the second conductivity type of the RF MOS transistor; the first region laying partially underneath the gate; the second enhanced drain drift region contacting the first enhanced drain drift region, the dopant concentration of the second enhanced drain drift region is higher than the dopant concentration of the first enhanced drain drift region; (4) a drain region of the second conductivity type contacting the second enhanced drain drift region; (5) a body region of said RF MOS transistor of the first conductivity type with the dopant concentration being at least equal to the dopant concentration of the semiconductor epi layer; (6) a source region of the second conductivi

Abstract: The apparatus for assembly of high power hybrid modules including high power semiconductor chips and conventional surface mount technology (SMT) components are disclosed. The vacuum oven is used for creating the permanent electrical connection between each high power semiconductor chip and the high power hybrid module. The soldering reflow process is used to attach each SMT component to the high power hybrid module. The automated high power hybrid modules assembling process yields the high power hybrid modules with excellent thermal properties.

Abstract: The lateral RF MOS device having two drain drift regions and a conductive plug source connection structure is disclosed. The usage of two drain drift regions results in the increased source-drain breakdown voltage and in increased maximum drain current density. The lateral RF MOS device of the present intention can be used for high power and high frequency applications.

Abstract: The lateral RF MOS device having a conducive plug in the source region and an oxide plug in the drain region is disclosed. The oxide plug in the drain region reduces the drain-source capacitance, improves the matching ability to the outside circuitry, and results in a lateral RF MOS device having a wider BW, and an improved power efficiency than a prior art lateral RF MOS device. The oxide plug can comprise a shallow plug or a deep plug. The shallow oxide plug results in a lesser reduction in the drain-source capacitance but is relatively easy to fabricate. The deep oxide plug results in a higher reduction in the drain-source capacitance but is relatively difficult to fabricate.

Abstract: Methods of fabrication of a lateral RF MOS device having a non-diffusion connection between source and substrate are disclosed. In one embodiment, the lateral RF MOS device has an interdigitated silicided gate structure. In another embodiment, the lateral RF MOS device has a quasi-mesh silicided gate structure. Both sides of each gate are oxidized thus preventing possible shorts between source and gate regions and between drain and gate regions. The top of each gate is silicided once the protective layer of silicon nitride is removed.

Abstract: A semiconductor MOSFET device having a decreased length of the channel region is disclosed. In one embodiment of the device, each gate includes three gate subregions. An enhancement drift drain region underlies the first gate subregion, a channel region underlies the third gate subregion, and each enhancement drift drain region and each channel region are separated by an epitaxial region underlying the second gate subregion. The device of the present invention if used as an amplifier, has a more linear transfer characteristic, less cross talk and less channel interference than a conventional semiconductor MOSFET device having a conventional gate region without gate subregions.

Abstract: Methods of fabrication of a lateral RF MOS device having a non-diffusion connection between source and substrate are disclosed. In one embodiment, the lateral RF MOS device has an interdigitated silicided gate structure. In another embodiment, the lateral RF MOS device has a quasi-mesh silicided gate structure. Both sides of each gate are oxidized thus preventing possible shorts between source and gate regions and between drain and gate regions. The top of each gate is silicided once the protective layer of silicon nitride is removed.

Abstract: Methods of fabrication of a lateral RF MOS device having a non-diffusion connection between source and substrate are disclosed. In one embodiment, the lateral RF MOS device has an interdigitated silicided gate structure. In another embodiment, the lateral RF MOS device has a quasi-mesh silicided gate structure.

Abstract: The glue deposit device and method for automatically mounting a plurality of power devices to a heatsink using a plurality of spring clamps. The fully automated unconventional pick-and-place machine and method utilizing the glue deposit device for assembling the power printed circuit board using the spring clamps are also disclosed.

Abstract: A lateral RF MOS device having a combined source connection structure is disclosed. The combined source connection structure utilizes a diffusion area and a conductive plug region. In one embodiment, the diffusion source area forms a contact region connecting the top surface of the semiconductor material to a highly conductive substrate of the lateral RF MOS transistor structure. In another embodiment, the diffusion source area is located completely within the epitaxial layer of the lateral RF MOS transistor structure. The conductive plug region makes a direct physical contact between a backside of the semiconductor material and the diffusion contact area.

Abstract: A source connection structure for a lateral RF MOS device is disclosed. The connection structure utilizes a conductive plug to connect a source area and a body area of the device with a backside. The usage of a conductive plug eliminates at least one doping area used for connectivity purposes. Therefore, the density of RF MOS devices per unit area of the chip is increased.

Abstract: A quasi-mesh gate structure for the RF MOS transistor having a conductive plug source-body-backside connection is disclosed. The RF MOS transistor having the quasi-mesh gate structure utilizes significantly shorter feeding gate paths as compared to the long feeding gate paths used in the prior art RF MOS devices. The RF MOS transistor having the quasi-mesh gate structure can utilize the polysilicon gates or silicided gates. This results in simplification of the fabrication process and/or improved performance at high frequencies.

Abstract: A pre-post distortion amplifier is disclosed. The device comprises the four-cascade amplifier comprising two driver amplifiers and two power amplifiers. The pre-post distortion amplifier allows one to amplify at least two RF signals with almost full compensation of the distortion signal introduced by the propagation of input signals within the pre-post distortion amplifier. Each pair of driver-power amplifiers is scaled down in power output to achieve the optimum result.