Patents Examined by Adolf Doneke Berhane
  • Patent number: 6317346
    Abstract: An apparatus and a method for using at least two multiphase AC power sources to provide seamless uninterruptible power to a common load by isolating a faulty phase or source upon detection of a fault in one of the sources or in one of the phases thereof. To combine at least two three-phase power sources in parallel, for example, the apparatus includes a power paralleling circuit comprising two three-phase silicon controlled rectifier (SCR) bridges and a controller. Each bridge receives power from one of two separate and/or independent three-phase power sources. The controller monitors the status or condition of respective phases of power and selectively gates an associated SCR in each bridge so as to simultaneously power the common load from the two sources. Isolation switches are located in series with each phase circuit of each power supply. In the event of a fault, e.g.
    Type: Grant
    Filed: November 9, 2000
    Date of Patent: November 13, 2001
    Assignee: AT&T Corporation
    Inventor: Jack J. Early
  • Patent number: 6236584
    Abstract: Automatic voltage conversion module including a rectifier for receiving and rectifying a utility AC power, a smoother for smoothing a voltage rectified at the rectifier, a voltage sensor for sensing the voltage from the smoother to determine an amplitude of a supplied power, and a smoothing operation selector for changing operation paths of the rectifier according to result of the determination at the voltage senor, thereby permitting a system to make a smooth and regular operation.
    Type: Grant
    Filed: June 1, 2000
    Date of Patent: May 22, 2001
    Assignee: LG Electronics Inc.
    Inventor: Bon Kwon Koo
  • Patent number: 5914866
    Abstract: An inverter-control device includes a subtractor for detecting an error between a waveform of a reference current signal generated in synchronization with a waveform of an inverter output current signal and the inverter output current signal, a delay portion for delaying by a prescribed time period a signal obtained by amplifying and removing high frequency component by filtering the error, an error waveform integrating portion for integrating the delayed signal f' output from delay portion, a proportional control portion for amplifying the error, and an adding portion for adding an error amplified signal output from the proportional control portion and an inverter driving waveform pattern output from the error waveform integrating portion.
    Type: Grant
    Filed: December 10, 1997
    Date of Patent: June 22, 1999
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masaki Eguchi, Hirokazu Kodama, Tsukasa Takebayashi, Hirofumi Nakata