Patents Examined by An Luu
  • Patent number: 11974440
    Abstract: A memory device includes: a memory cell array including a plurality of memory cells; and a page buffer circuit provided in a page buffer region including a main region and a cache region provided in a first horizontal direction, and including a first page buffer unit and a second page buffer unit adjacent to each other in a second horizontal direction in the main region. A first sensing node of the first page buffer unit includes a first lower metal pattern, and a first upper metal pattern, and electrically connected to the first lower metal pattern. A second sensing node of the second page buffer unit includes a second lower metal pattern, and a second upper metal pattern, electrically connected to the second lower metal pattern, and not adjacent to the first upper metal pattern in the second horizontal direction.
    Type: Grant
    Filed: March 31, 2021
    Date of Patent: April 30, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yongsung Cho, Inho Kang, Ansoo Park, Jeunghwan Park, Dongha Shin, Jeawon Jeong
  • Patent number: 11973881
    Abstract: A method for electronically signing contracts between at least a first and a second parties, the method including a first party accessing second party's website and fills in an on-line form with party personal data which is sent to a second party's server. The method of the inventions solves the problem of signing contracts between two parties, hence the object of the present invention is a computer implemented method that deals with the issue of protection against unauthorised use of data from within the employees of TTP companies and we present a solution in which a TTP company can certify the validity of a contract without having access to its content. In this way, the TTP minimizes the information it has access to and reduces the risks derived from such knowledge, like an eventual data leakage caused by some dishonest TTP employee.
    Type: Grant
    Filed: June 2, 2020
    Date of Patent: April 30, 2024
    Assignee: LLEIDANETWORKS SERVEIS TELEMÀTICS, S.A.
    Inventors: Francisco Jose Sapena Soler, Carolina Sola
  • Patent number: 11973636
    Abstract: A communication device includes a first communication interface for a first transmission path, a second communication interface for a second transmission path, a control unit that controls a communication path internal to the communication device of a signal received by the first communication interface, and a processing unit that performs predetermined processing on the received signal, wherein the control unit performs control to output, in a case where the communication device is in a first state, the received signal to the second communication interface via the processing unit, and output, in a case where the communication device is in a second state, the received signal to the second communication interface by bypassing the processing unit.
    Type: Grant
    Filed: September 23, 2022
    Date of Patent: April 30, 2024
    Assignee: Canon Kabushiki Kaisha
    Inventor: Kazuhiko Morimura
  • Patent number: 11973868
    Abstract: Methods, machine readable media and systems for near-field electromagnetic simulation for side-channel emission analysis of an integrated circuit (IC) are described. In one embodiment, a method can include the following operations: simulating EM field strengths for a plurality of grid partitions of a circuit area of the IC based on a cryptographic work load applied to a model of the IC; identifying one or more of the grid partitions as a security sensitive region for the IC based on the EM field strengths, wherein one or more grid partitions outside of the security sensitive region are identified as non-security sensitive regions for the IC; and simulating EM fields for the IC to perform the EM side-channel emission analysis, wherein contributions of the EM fields from the non-security sensitive regions for the EM side-channel emission analysis are based on a linear superposition of wire currents in the non-security sensitive regions of the IC.
    Type: Grant
    Filed: September 22, 2020
    Date of Patent: April 30, 2024
    Assignee: ANSYS, INC.
    Inventors: Deqi Zhu, Norman Chang, Lang Lin, Dinesh Kumar Selvakumaran, Yu Lu
  • Patent number: 11972842
    Abstract: A method evolves generic computational building blocks. The method obtains a parent population with programs that encode functions. The method also obtains a list of randomly generated test inputs. The method generates a target dataset that includes input-output pairs of randomly generated binary strings. The method also applies a fitness function to assign a fitness score to each program, based on the target dataset. The method grows a seed list by applying genetic operators, and selecting offspring that satisfy a novelty condition. The novelty condition is representative of an ability of a program to produce unique output for the list of randomly generated test inputs. The method iterates until a terminating condition has been satisfied. The terminating condition is representative of an ability of programs in the seed list to solve one or more genetic programming instances.
    Type: Grant
    Filed: November 14, 2022
    Date of Patent: April 30, 2024
    Assignee: Natural Computation LLC
    Inventor: David James Landaeta
  • Patent number: 11971506
    Abstract: The disclosure relates to a light propagation time pixel, comprising modulation gates and integration nodes which are arranged on the upper face of a photosensitive semiconductor region. The photosensitive semiconductor region is designed as an N-epitaxy and is delimited laterally and/or at the corners by p-doped vertical p-structures. A buried layer with a p-doping adjoins the lower face of the photosensitive semiconductor region, and the vertical p-structures are in electric contact with the buried layer.
    Type: Grant
    Filed: August 30, 2019
    Date of Patent: April 30, 2024
    Assignee: PMDTECHNOLOGIES AG
    Inventors: Matthias Franke, Robert Rössler
  • Patent number: 11973036
    Abstract: A method of manufacturing a semiconductor package structure is provided. The method includes providing a first carrier, forming a patterned buffer layer over the first carrier, forming a first redistribution structure that includes forming a first dielectric layer on the patterned buffer layer, after an electrical testing by applying an electric signal towards the first redistribution structure, removing the first carrier, removing portions of the first dielectric layer, resulting in a patterned first dielectric layer, the patterned first dielectric layer exposing portions of the first circuit layer, removing the exposed portions of the first circuit layer, using the patterned first dielectric layer as a mask, resulting in a patterned first circuit layer, and forming an electric conductor in a recess defined by the patterned first dielectric layer and the patterned first circuit layer.
    Type: Grant
    Filed: September 13, 2021
    Date of Patent: April 30, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Ting-Yang Chou
  • Patent number: 11972244
    Abstract: A method and apparatus for improving mobile application that enable: unpacking a first mobile application to obtain contents including codes and resource data of the first mobile application; setting a name space for the resource data of the first mobile application and of a second mobile application; assembling the codes of the first and second mobile applications; and packing the assembled codes of the first and second mobile applications, the resource data of the first and second mobile applications, and data of the name space to create an improved mobile application, wherein the method further comprises capturing images of the improved mobile application; using neural network to determine a category for the captured images; and extracting features in the captured images according to the category to monitor status or gather data from the improved mobile application.
    Type: Grant
    Filed: November 12, 2021
    Date of Patent: April 30, 2024
    Assignee: IRON GAMING LIMITED
    Inventors: Peter Marek Zmijewski, Scott Matthew Dowdell
  • Patent number: 11972455
    Abstract: Systems, methods and media for adaptive real time modeling and scoring are provided. In one example, a system for automatically generating predictive scoring models comprises a trigger component to determine, based on a threshold or trigger, such as a detection of new significant relationships, whether a predictive scoring model is ready for a refresh or regeneration. An automated modeling sufficiency checker receives and transforms user-selectable system input data. The user-selectable system input data may comprise at least one of email, display or social media traffic. An adaptive modeling engine operably connected to the trigger component and modeling sufficiency checker is configured to monitor and identify a change in the input data and, based on an identified change in the input data, automatically refresh or regenerate the scoring model for calculating new lead scores. A refreshed or regenerated predictive scoring model is output.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: April 30, 2024
    Assignee: Zeta Global Corp.
    Inventors: Pavan Korada, Sunpreet Singh Khanuja, Yun Sam Chong, Bharat Goyal, Edward Robert Rau, Jr.
  • Patent number: 11970626
    Abstract: The present disclosure provides an inkjet ink and primer fluid set containing an aqueous primer composition and aqueous inkjet inks. At least one of the inks contains a first pigment dispersion and a second pigment dispersion. The first pigment dispersion forms an aggregation with the primer composition whereas the second pigment dispersion does not form an aggregation with the primer composition.
    Type: Grant
    Filed: December 9, 2020
    Date of Patent: April 30, 2024
    Assignee: DUPONT ELECTRONICS, INC.
    Inventors: Xiaoqing Li, Ji Yeon Huh, Cullen Kirkpatrick
  • Patent number: 11972786
    Abstract: Provided are a function switchable random access memory, including: two electromagnetic portions configured to connect a current; a magnetic recording portion between the two electromagnetic portions and including a spin-orbit coupling layer and a magnetic tunnel junction; a pinning region between each of the electromagnetic portions and the magnetic recording portion; a cut-off region on a side of each of the electromagnetic portions opposite to the pinning region, the spin-orbit coupling layer is configured to generate a spin current under an action of the current; the two electromagnetic portions is configured to generate two magnetic domains with magnetization pointing in opposite directions under an action of the spin current; the magnetic tunnel junction is configured to generate a magnetic domain wall based on the two opposite magnetic domains and is configured to drive the magnetic domain wall to reciprocate under the action of the spin current.
    Type: Grant
    Filed: July 6, 2022
    Date of Patent: April 30, 2024
    Assignee: INSTITUTE OF SEMICONDUCTORS, CHINESE ACADEMY OF SCIENCES
    Inventors: Kaiyou Wang, Yu Sheng
  • Patent number: 11972179
    Abstract: Provided is a method of simulating a quantum computing system having an error correction function. The method includes generating a quantum information density matrix, generating a coded density matrix by performing quantum error correction coding on the quantum information density matrix, applying quantum computing to the coded density matrix and calculating a change in a first reliability of the coded density matrix, applying the quantum computing to the quantum information density matrix and calculating a change in a second reliability of the quantum information density matrix, and determining an operation time of the quantum computing, based on the change in the first reliability and the change in the second reliability.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: April 30, 2024
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Chungheon Baek, Byung-Soo Choi
  • Patent number: 11972839
    Abstract: A memory system includes a memory device including an interface circuit and a semiconductor memory, and a controller to generate a command for controlling the memory device. The interface circuit receives the command from the controller; determines whether the command is for the semiconductor memory or the interface circuit; and when it is determined that the command is for the interface circuit, performs a blocking operation to block transfer of the command between the interface circuit and the semiconductor memory and performs an internal operation of the interface circuit. The internal operation includes a signal controlling operation, a training operation, a read operation, an on-die termination operation, a ZQ calibration operation, or a driving force control operation.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: April 30, 2024
    Assignee: SK hynix Inc.
    Inventors: Chang Kyun Park, Young Sik Koh, Seung Jin Park, Dong Hyun Lee
  • Patent number: 11968316
    Abstract: A system for enhanced public key infrastructure is provided. The system includes a computer device. The computer device is programmed to receive a digital certificate including a composite signature field including a plurality of signatures. The plurality of signatures include at least a first signature and a second signature. The computer device is also programmed to retrieve, from the digital certificate, a first key associated with the first signature from the digital certificate. The computer device is further programmed to retrieve the first signature from the composite signature field. In addition, the at least one computer device is programmed to validate the first signature using the first key.
    Type: Grant
    Filed: January 9, 2023
    Date of Patent: April 23, 2024
    Assignee: Cable Television Laboratories, Inc.
    Inventor: Massimiliano Pala
  • Patent number: 11967554
    Abstract: Semiconductor devices includes a first interlayer insulating layer, a lower interconnection line in the first interlayer insulating layer, an etch stop layer on the first interlayer insulating layer and the lower interconnection line, a second interlayer insulating layer on the etch stop layer, and an upper interconnection line in the second interlayer insulating layer. The upper interconnection line includes a via portion extending through the etch stop layer and contacting the lower interconnection line. The via portion includes a barrier pattern and a conductive pattern. The barrier pattern includes a first barrier layer between the conductive pattern and the second interlayer insulating layer, and a second barrier layer between the conductive pattern and the lower interconnection line. A resistivity of the first barrier layer is greater than that of the second barrier layer. A nitrogen concentration of the first barrier layer is greater than that of the second barrier layer.
    Type: Grant
    Filed: November 8, 2022
    Date of Patent: April 23, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jongjin Lee, Kyungwook Kim, Rakhwan Kim, Seungyong Yoo, Eun-Ji Jung
  • Patent number: 11968202
    Abstract: A method of authenticating a user to a computer in an adverse environment includes receiving the user's password in a trusted user device, such as by the user typing the password, and encoding a keyword with a hash of the entered password to create an encoded keyword. The encoded keyword is sent from the trusted user device to the computer using a physical communication channel perceivable by the user; and the encoded keyword is compared in the computer with a keyword encoded with a known hash of the user's password in the computer to authenticate the user.
    Type: Grant
    Filed: May 24, 2019
    Date of Patent: April 23, 2024
    Assignee: Avast Software s.r.o.
    Inventors: Karel Fuka, Vojt{hacek over (e)}ch Tůma
  • Patent number: D1024225
    Type: Grant
    Filed: April 26, 2021
    Date of Patent: April 23, 2024
    Assignee: Guangzhou Saiwan Intelligent Technology Co., Ltd.
    Inventor: Haojia Chen
  • Patent number: D1024324
    Type: Grant
    Filed: February 3, 2022
    Date of Patent: April 23, 2024
    Assignee: EZISURG MEDICAL CO., LTD.
    Inventors: Honglin Nie, Youbao Huang
  • Patent number: D1024327
    Type: Grant
    Filed: April 18, 2022
    Date of Patent: April 23, 2024
    Assignee: SteriLance Medical (Suzhou) Inc.
    Inventor: Guoping Shi
  • Patent number: D1024328
    Type: Grant
    Filed: February 14, 2023
    Date of Patent: April 23, 2024
    Assignee: Pro Cell Therapies, LLC
    Inventors: Mitchell Edward Schwartz, Daniel Troyen-Schwartz