Abstract: A digital filter for reducing a sampling rate for an input signal includes a parallelizing block for splitting the input signal into at least two parallel raw signals, an integration block for converting the parallel raw signals into an intermediate signal, and a differentiation block for generating an output signal by differentiating the intermediate signal. The integration block includes a logic block that is designed for generating two parallel sum signals from the parallel raw signals using summation operations, and a recursion block that is designed for generating the intermediate signal recursively from the parallel sum signals.

Abstract: A random number generation method and apparatus using a low-power microprocessor is provided. In the random number generation method, a low-power microprocessor determines whether external power is supplied to a random number generator. The low-power microprocessor updates an internal state of the random number generator based on a first scheme if it is determined that the external power is supplied to the random number generator. The low-power microprocessor updates the internal state of the random number generator based on a second scheme different from the first scheme if it is determined that the external power is not supplied to the random number generator.