Patents Examined by Andrew S. Roberts
  • Patent number: 5664159
    Abstract: A single breakpoint address register on a CPU is shared to emulate a plurality of breakpoint registers. A plurality of breakpoints are stored in an emulation area of main memory. One of these breakpoints is loaded into the single breakpoint register on the CPU. When a translation-lookaside buffer (TLB) on the CPU detects a page miss, a page miss handler activates a debug processing routine to determine if the faulting page contains one of the breakpoints. If the faulting page does contain a breakpoint, then this breakpoint is written to the single breakpoint register on the CPU. Any page in TLB is invalidated if it contained the old breakpoint that was overwritten by the new breakpoint in the single breakpoint register. Thus only one breakpoint can have a page translation in the TLB at any time, and the breakpoints are swapped in and out of single breakpoint register when the TLB entries are swapped. A TLB invalidate entry instruction finds the old breakpoint's TLB entry and invalidates it.
    Type: Grant
    Filed: May 8, 1995
    Date of Patent: September 2, 1997
    Assignee: Exponential Technology, Inc.
    Inventors: David E. Richter, James S. Blomgren
  • Patent number: 5634115
    Abstract: A behavioral description translation method is disclosed wherein output and input access functions are identified from behavioral descriptions of the underlying circuit and its components. Structural representations of the behavioral descriptions of the circuits components as identified by the access functions are constructed therefrom from a set of branch primitives provided. From the constructed branches, those S-type branches, i.e., voltage sources and current probes, that are connected in series between the same pair of nodes into one branch where the voltage on the new branch is the sum of the voltages of the old branches are collapsed. Those P-type branches, i.e., the current sources and voltage probes, that are connected in parallel between the same pair of nodes into one branch where the current through the new branch is the sum of the currents of the old branches are collapsed.
    Type: Grant
    Filed: December 13, 1994
    Date of Patent: May 27, 1997
    Assignee: Cadence Design Systems, Inc.
    Inventors: Daniel Fitzpatrick, Kenneth S. Kundert
  • Patent number: 5621671
    Abstract: The growth and development of a biological organism reflected as a series of molecular and cellular processes by chromatin switching networks, form threshold mechanisms applied through simulation transcription rules to pattern formations of a digital approximation of regulator concentration gradient. Digital logic statements are derived from such pattern formations to simulate the growth and development of the organism.
    Type: Grant
    Filed: March 17, 1995
    Date of Patent: April 15, 1997
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventor: John W. Bodnar