Patents Examined by Aristocratis Fotakis
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Patent number: 11848696Abstract: An aspect includes an apparatus including a first amplifier; a first field effect transistor (FET) including a first source coupled to an output of the first amplifier, and a first drain for coupling to a first load; and a first gate drive circuit including an input coupled to the output of the first amplifier and an output coupled to a first gate of the first FET. Another aspect includes a method including amplifying a first audio signal using a first audio amplifier to generate a first voltage; generating a first gate voltage based on the first voltage; applying the first gate voltage to a first gate of a first field effect transistor (FET) coupled between the first audio amplifier and a first audio transducer; and applying the first voltage to a first source of the first FET.Type: GrantFiled: October 26, 2022Date of Patent: December 19, 2023Assignee: QUALCOMM IncorporatedInventors: Kshitij Yadav, Vijayakumar Dhanasekaran
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Patent number: 11843404Abstract: A communications device including a receiver configured to receive a plurality of sub-units of an encoded transport block of data in a plurality of time-divided units within frequency resources of a wireless access interface allocated to the mobile terminal, each of the sub-units being received a repeated number of times within a repetition cycle; and circuitry configured to combine a same sub-unit received the repeated number of times to form a composite sub-unit to recover the transport block.Type: GrantFiled: October 31, 2022Date of Patent: December 12, 2023Assignee: SONY GROUP CORPORATIONInventors: Shin Horng Wong, Martin Warwick Beale
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Patent number: 11843488Abstract: A signal processing device includes an acquisition unit that acquires identification information associated with data obtained by decoding a reception signal that includes a signal included in a first layer and a signal included in a different layer and superimposed on the signal of the first layer in a power axis direction, the data being output to a post-stage processing unit, a decoding unit that decodes the signal of the different layer on the basis of a result of decoding of the signal of the first layer after the decoding of the signal of the first layer, and an output control unit that outputs data obtained by decoding the signal of the different layer to the post-stage processing unit without outputting data obtained by decoding the signal of the first layer to the post-stage processing unit, in a case where data identified by the identification information is data obtained by decoding the signal of the different layer.Type: GrantFiled: January 14, 2020Date of Patent: December 12, 2023Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventor: Yutaka Nakada
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Patent number: 11838072Abstract: Certain aspects of the present disclosure provide techniques for determining a cable loss associated with a transmission cable of an apparatus. An example method includes sending, to a radio modem of the apparatus, a request for the radio modem to use a target power when sending one or more signals to the signal compensator device for determining a cable loss associated with a transmission cable communicatively coupling the radio modem with the signal compensator device, receiving, at a signal compensator device of the apparatus, the one or more signals from the radio modem sent using the target power, and determining the cable loss associated with the transmission cable based on the one or more signals.Type: GrantFiled: September 27, 2021Date of Patent: December 5, 2023Assignee: QUALCOMM IncorporatedInventors: Cheng Tan, Lei Sun, Sean Vincent Maschue, Bruce Charles Fischer, Jr., Brian French
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Patent number: 11831481Abstract: Apparatuses, methods, and systems are disclosed for generating a CSI report. One apparatus includes a transceiver that receives a set of reference signals transmitted from a base station and a processor that transforms the set of reference signals to obtain per-layer vectors of amplitude and phase coefficients of a DFT-compressed codebook. Here, each amplitude coefficient vector and phase coefficient vector corresponding to a tap in at least one identified beam. The processor calculates a subset of the taps for the at least one identified beam and controls the transceiver to transmit CSI feedback including the calculated taps to the base station, where each tap is an inverse Fourier transform of rows of time-domain coefficient vectors and where the CSI feedback includes an indication of one or more elements of the vectors of amplitude coefficient vectors and phase coefficient vectors corresponding to the at least one identified beam.Type: GrantFiled: August 16, 2021Date of Patent: November 28, 2023Assignee: Lenovo (Singapore) Pte. Ltd.Inventors: Udar Mittal, Tyler Brown, Ahmed Hindy
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Patent number: 11800517Abstract: A method for transmitting a downlink signal comprises: determining, by a terminal device, that at least two downlink signals are to be received in a first detection window; determining, by the terminal device, a receiving scheme for the at least two downlink signals based on transmission information of the at least two downlink signals, wherein the transmission information includes at least one of scheduling information of the at least two downlink signals, transmission configuration of the at least two downlink signals, or information carried in the at least two downlink signals; and receiving, by the terminal device, at least one of the at least two downlink signals in the first detection window based on the receiving scheme for the at least two downlink signals.Type: GrantFiled: October 30, 2020Date of Patent: October 24, 2023Assignee: GUANGDONG OPPO MOBILE TELECOMMUNICATIONS CORP., LTD.Inventors: Wenhong Chen, Zhihua Shi
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Patent number: 11784694Abstract: A method for measuring and reporting channel state information (CSI) in a wireless communication system and a device therefor. Specifically, a method for reporting, by a user equipment, channel state information (CSI) in a wireless communication system includes: receiving CSI reporting setting information related with CSI reporting; receiving one or more channel state information (CSI)-reference signals (CSI-RSs); performing the CSI reporting by using a measurement value estimated by at least one specific CSI-RS among the one or more CSI-RSs, in which the at least one specific CSI-RS may be determined based on gap information for configuring a measurement interval for estimating the measurement value and a performing timing of the CSI reporting.Type: GrantFiled: October 22, 2021Date of Patent: October 10, 2023Assignee: LG Electronics Inc.Inventors: Jiwon Kang, Jonghyun Park, Kijun Kim, Hyungtae Kim
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Patent number: 11777545Abstract: An interference cancellation device includes a data symbol extraction unit that extracts a data symbol portion from a received signal, a null symbol extraction unit that extracts a null symbol portion from the received signal, a data symbol power calculation unit that calculates a data symbol power estimated value, a null symbol power calculation unit that calculates a null symbol power estimated value, a null symbol spectrum calculation unit that calculates a null symbol spectrum from a null symbol signal, and an interference center frequency estimation unit that eliminates the effect of an image for an interference in calculation of an interference bandwidth when is calculating an interference center frequency estimated value, using a data symbol signal, the data symbol power estimated value, the null symbol power estimated value, and the null symbol spectrum.Type: GrantFiled: June 23, 2022Date of Patent: October 3, 2023Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Manabu Sakai, Koji Tomitsuka, Hiroki Iura
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Patent number: 11770201Abstract: Provided is a sequence allocation method capable of reducing inter-cell interference of a reference signal when a ZC sequence is used as the reference signal in a mobile communication system. In the sequence allocation method, R×M sequences specified by a ZC sequence number r (r=1 to R) and a cyclic shift sequence number m (m=1 to M) are divided into a plurality of sequence groups X (X=1 to R) in accordance with the transmission band width of the reference signal, so that the ZC sequence is allocated to each cell in each sequence group unit. When it is assumed that R=9 and M=6, the number of sequences is 54. Each of the sequence groups is formed by two sequences. Accordingly, the number of sequence groups is 27. The 27 types of sequence groups are allocated to each cell.Type: GrantFiled: October 26, 2021Date of Patent: September 26, 2023Assignee: Panasonic Holdings CorporationInventors: Yoshihiko Ogawa, Daichi Imamura, Sadaki Futagi, Tomofumi Takata
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Patent number: 11750254Abstract: An example method may include obtaining first beamforming feedback from a station based on first sounding signals from a first set of antennas selected from multiple antennas of an access point, and obtaining second beamforming feedback from the station based on second sounding signals from a second set of antennas selected from the multiple antennas of the access point. The method may also include, using the first beamforming feedback and the second beamforming feedback, determining correlational relationships between pairs of the multiple antennas of the access point, and deriving a beamforming steering matrix from the correlational relationships.Type: GrantFiled: May 9, 2022Date of Patent: September 5, 2023Assignee: MaxLinear, Inc.Inventor: Evgenii Dombrovskii
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Patent number: 11750166Abstract: An analog front-end (AFE) device and method for a high baud-rate receiver. The device can include an input matching network coupled to a first buffer device, which is coupled to a sampler array. The input matching network can include a first T-coil configured to receive a first input and a second T-coil configured to receive a second input. The first buffer device can include one or more buffers each having a bias circuit coupled to a first class-AB source follower and a second class-AB source follower. The sampling array can include a plurality of sampler devices configured to receive a multi-phase clocking signal. Additional optimization techniques can be used, such as having a multi-tiered sampler array and having the first buffer device configured with separate buffers for odd and even sampling phases. Benefits of this AFE configuration can include increased bandwidth, sampling rate, and power efficiency.Type: GrantFiled: January 13, 2021Date of Patent: September 5, 2023Assignee: Marvell Asia Pte. Ltd.Inventors: Stephane Dallaire, Ray Luan Nguyen, Geoffrey Hatcher
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Patent number: 11742897Abstract: Embodiments of a method and an apparatus for wireless communications are disclosed. In an embodiment, a method for wireless communications involves assigning subcarriers of a first access point (AP) and a second AP to a subcarrier set of a virtual AP, generating, by the virtual AP, a packet that includes a signal for a station (STA) and that is transmitted using the subcarrier set, where generating the packet includes: encoding a preamble portion of the packet on the assigned subcarriers included in the subcarrier set, nulling the preamble portion of the packet for unassigned subcarriers of the first AP and the second AP, encoding a subsequent portion of the packet according to a Distributed Multiple-Input Multiple-Output (DMIMO) transmission, and transmitting the packet to the STA.Type: GrantFiled: July 7, 2021Date of Patent: August 29, 2023Assignee: NXP USA, Inc.Inventors: Hari Ram Balakrishnan, Sudhir Srinivasa
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Patent number: 11728774Abstract: An average power tracking (APT) power management integrated circuit (PMIC) is provided. The APT PMIC is configured to generate an APT voltage to a power amplifier for amplifying a high modulation bandwidth (e.g., ?200 MHz) radio frequency (RF) signal. The APT PMIC includes a voltage amplifier configured to generate an initial APT voltage and an offset capacitor configured to raise the initial APT voltage by a modulated offset voltage. The APT PMIC can be configured to modulate the initial APT voltage and the modulated offset voltage concurrently based on a time-variant APT target voltage. As a result, the APT PMIC can adapt the APT voltage very quickly between different voltage levels, thus making it possible to amplify a high modulation bandwidth radio frequency (RF) signal for transmission in a fifth-generation (5G) communication system.Type: GrantFiled: February 1, 2021Date of Patent: August 15, 2023Assignee: Qorvo US, Inc.Inventor: Nadim Khlat
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Patent number: 11728817Abstract: The present invention relates to data communication and electrical circuits. More specifically, embodiments of the present invention provide a clock and data recovery (CDR) architecture implementation for high data rate wireline communication links. In an embodiment, a CDR device includes a phase detector, a loop filter, and a fractional-N PLL. The fractional-N PLL generates output clock signal based on output of the loop filter. There are other embodiments as well.Type: GrantFiled: January 3, 2022Date of Patent: August 15, 2023Assignee: MARVELL ASIA PTE LTDInventors: Mrunmay Talegaonkar, Jorge Pernillo, Junyi Sun, Praveen Prabha, Chang-Feng Loi, Yu Liao, Jamal Riani, Belal Helal, Karthik S. Gopalakrishnan, Aaron Buchwald
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Patent number: 11716124Abstract: Methods, systems, and devices for wireless communications are described. A base station to communicate with a set of user equipments (UEs) in a spatial division multiplexing (SDM) configuration for dynamic spectrum sharing (DSS) communications. One or more first UEs of the set of UEs may communicate via a first radio access technology (RAT), and one or more second UEs may communicate via a second RAT in a multiple-user multiple-input multiple output (MU-MIMO) configuration. The base station may indicate the SDM configuration to one or more of the set of UEs. In some examples, the base station may transmit an indication to the set of UEs which may indicate a set of resources to be used for DSS communications. In some examples, the SDM configuration may specify one or more reference signal patterns for communicating in the set of resources.Type: GrantFiled: June 16, 2021Date of Patent: August 1, 2023Assignee: QUALCOMM IncorporatedInventors: Wooseok Nam, Tao Luo, Kausik Ray Chaudhuri
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Patent number: 11700012Abstract: A digital-to-analog conversion circuit includes a first digital-to-analog converter (DAC) and a second DAC. The first DAC includes a first current generation circuit (CGC) and a first current-to-voltage converter. The first CGC generates a first current based on a first digital code received through a first terminal to provide the first current to an output node. The second DAC includes a second CGC and a second current-to-voltage converter. The second CGC generates a second current based on a second digital code received through a second input terminal to provide the second current to the output node. The first current-to-voltage converter and the second current-to-voltage converter convert a sum of the first current and the second current to a an analog voltage corresponding to a sum of the first digital code and the second digital code, and output the analog voltage at the output node.Type: GrantFiled: May 3, 2021Date of Patent: July 11, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Kyeongjoon Ko, Junhan Bae, Hanseok Kim, Byeonggyu Park, Jaehyun Park, Hobin Song, Sooeun Lee
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Patent number: 11700039Abstract: A front end radio frequency (RF) module including one or more first filter circuits configured to implement a front end function by filtering first signals communicated between one or more first antenna and a transceiver and one or more second filter circuits configured to implement at least a portion of an additional network function within the front end RF module by filtering second signals communicated between one or more second antennas and the transceiver.Type: GrantFiled: July 13, 2022Date of Patent: July 11, 2023Assignee: Avago Technologies International Sales Pte. LimitedInventors: Richard Ruby, William Carrol Mueller, Young Kwon, Joo Min Jung, Chan Hoe Koo
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Patent number: 11689174Abstract: An apparatus for communicating across an isolation barrier includes a differential pair of input terminals. The apparatus includes a bandpass filter circuit configured to receive a received signal on the differential pair of input terminals and to provide a received differential signal on a differential pair of nodes. The apparatus includes a demodulator directly coupled to the bandpass filter circuit and configured to directly demodulate the received differential signal on the differential pair of nodes to provide a demodulated received signal.Type: GrantFiled: June 1, 2021Date of Patent: June 27, 2023Assignee: Skyworks Solutions, Inc.Inventors: Huanhui Zhan, Krishna Pentakota
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Patent number: 11683016Abstract: A power amplifier module including an input configured to receive an input radio frequency signal, the input radio-frequency signal including a series of data symbols, an output configured to provide an output radio-frequency signal, a power amplifier having a signal input to receive the input radio-frequency signal and a power supply input to receive a supply voltage, the power amplifier configured to amplify the input radio-frequency signal to provide the output radio-frequency signal, and a controller to receive an indication of a peak output power level of an upcoming data symbol in the series of data symbols, to adjust at least the supply voltage provided to the power amplifier based on the peak output power level of the upcoming data symbol, and to configure the power amplifier module to maintain a substantially constant gain over the series of data symbols.Type: GrantFiled: January 5, 2021Date of Patent: June 20, 2023Assignee: SKYWORKS SOLUTIONS, INC.Inventor: Grant Darcy Poulin
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Patent number: 11671238Abstract: A line card of a network box receives a SYNC input signal and generates a first time stamp based on receipt of the SYNC input signal. The line card generates a system clock signal in a phase-locked loop and generates a SYNC output signal by dividing the system clock signal in a divider circuit. The SYNC output signal is fed back to an input terminal as a SYNC feedback signal. A time stamp is generated based on receipt of the SYNC feedback signal. The line card determines a time between the SYNC input signal and the SYNC feedback signal based on the first time stamp and the second time stamp. The timing of the SYNC output signal is adjusted based on the time difference using a coarse time adjustment by adjusting a divide ratio of the divider circuit and using a fine time adjustment in the phase-locked loop based on a residue of a remainder of the time difference not accounted for by the coarse time adjustment.Type: GrantFiled: August 9, 2021Date of Patent: June 6, 2023Assignee: Skyworks Solutions, Inc.Inventor: Vivek Sarda