Abstract: An adaptive clock recovery arrangement for deriving a synchronous clock from an asynchronous, packet stream such as an asynchronous transfer mode (ATM) cell stream. The deviation in the magnitude of information stored in a first-in-first-out memory is continually monitored, and the synchronous clock frequency, referred to as the adaptive line clock frequency, is adjusted in a plurality of modes, under the control of a processor. The adjustment is made in response to a detected increasing condition of the monitored deviation. The adjustments are open-loop adjustments made without continually adjusting the adaptive line clock frequency based on the monitored deviation. Damping is substantially reduced compared with "conventional" PLL arrangements because the open-loop adjustments result in a rapid frequency correction with perfect or nearly perfect deadbeat damping, i.e. without the frequency oscillations that continue after the correct frequency is reached in closed-loop arrangements.
Abstract: A synchronous transmission system that improves reception in areas where the main and the satellite signal create significant self interference. At least one of the synchronous transmitters is phase modulated in accordance with a selected modulation function which varies at a sub sonic rate.
Abstract: The receiver of a radio frequency modem (10) achieves temperature and component independence in two steps. The receiver accomplishes detection in unbalanced parallel paths (Q45, Q47; Q44, Q46) such that the diode drops of transistor base-to-emitter junctions in each path offsets those in the other path whereby temperature dependence of components does not adversely affect the operation of the receiver. Any residual base-to-emitter junction offset causes floating of the quiescent bias of the circuits. The floating is further removed by using the same ladder network (R119, R120, R121, R122, R136) to derive all references (60, 61, 62, 63), automatic gain control (63) as well as slicing levels (60, 61, 62). This minimizes the number of circuit components as compared, for example, to using balanced amplifiers.