Abstract: A new method for forming a high quality cobalt disilicide film in the fabrication of an integrated circuit is described. A semiconductor substrate is provided having silicon regions to be silicided. A thermal oxide layer is grown overlying the semiconductor substrate. A titanium layer is deposited overlying the thermal oxide layer. A cobalt layer is deposited overlying the titanium layer. A titanium nitride capping layer is deposited over the cobalt layer. The substrate is subjected to a first rapid thermal anneal whereby the cobalt is transformed to cobalt monosilicide where it overlies the silicon regions and wherein the cobalt not overlying the silicon regions is unreacted. The unreacted cobalt layer and the capping layer are removed. The substrate is subjected to a second rapid thermal anneal whereby the cobalt monosilicide is transformed to cobalt disilicide to complete formation of a cobalt disilicide film in the manufacture of an integrated circuit.

Abstract: A method for circuit modification of an microelectronic chip having at least one conductor in an organic dielectric, includes applying a protective inorganic surface layer on top of the organic dielectric, forming at least one window in the protective inorganic surface layer to selectively expose the underlying organic dielectric, etching the organic dielectric in the window area to selectively remove the organic dielectric adjacent to the conductor, and performing at least one process that modifies the conductor.

Abstract: Processes for forming trenches within silicon substrates are described. According to an embodiment of the invention, a masked substrate is initially provided that comprises (a) a silicon substrate and (b) a patterned resist layer over the silicon substrate. The patterned resist layer has one or more apertures formed therein. Subsequently, a trench is formed in the substrate through the apertures in the resist layer by an inductive plasma-etching step, which is conducted using plasma source gases that comprise SF6, at least one fluorocarbon gas, and N2. If desired, Cl2 can also be provided in addition to the above source gases. The process of the present invention produces chamber deposits in low amounts, while providing high etching rates, high silicon:resist selectivities, and good trench sidewall profile control.

Abstract: A method and apparatus for the polishing of diamond surfaces, wherein the diamond surface is subjected to plasma-enhanced chemical etching using an atomic oxygen polishing plasma source, are disclosed. In the apparatus, a magnetic filter passes a plume of high-density, low-energy, atomic oxygen plasma. The plasma is capable of uniformly polishing diamond surfaces.

Abstract: A deoxidizing liquid composition for aluminum contains in addition to water: fluoroborate anions, preferably from added fluoroboric acid; an acid, preferably nitric acid, that is a substantially stronger acid than either fluoroboric acid or boric acid; an additional oxidizing agent, preferably hydrogen peroxide; and an organic azole compound. Preferably the composition also contains propylene glycol, which is a stabilizer for hydrogen peroxide and also improves deoxidizing results.

Abstract: Methods, apparatuses and substrate assembly structures for mechanical and chemical-mechanical planarizing processes used in the manufacturing microelectronic-device substrate assemblies. One aspect of the invention is directed toward a method for planarizing a microelectronic-device substrate assembly by removing material from a surface of the substrate assembly, detecting a first change in drag force between the substrate assembly and a polishing pad indicating that the substrate surface is planar, and identifying a second change in drag force between the substrate assembly and the polishing pad indicating that the planar substrate surface is at the endpoint elevation. After the second change in drag force is identified, the planarization process is stopped.

Abstract: A process for producing semiconductor wafers by double-sided polishing between two rotating, upper and lower polishing plates, which are covered with polishing cloth, while an alkaline polishing abrasive with colloidal solid fractions is being supplied, the semiconductor wafers being guided by carriers which have circumferential gear teeth and are set in rotation by complementary outer gear teeth and inner gear teeth of the polishing machine, which is distinguished by the following process steps: (a) at least one of the two sets of gear teeth of the polishing machine is at least from time to time sprayed with a liquid which substantially comprises water, (b) the alkaline polishing abrasive is fed continuously to the semiconductor wafers in a closed supply device. There is also a device which is suitable for carrying out the process.

Abstract: Pillars are formed in a fully integrated thermal inkjet printhead to prevent particles from entering into a nozzle chamber along an ink refill channel. The pillars are formed after a step of applying a thin film structure to a substrate. At one step, pits are etched through the thin film structure. At another step, material for an orifice layer is deposited into the pits. At another step, a firing chamber is etched into the orifice layer. At another step, a trench is etched into the backside of the wafer in the vicinity of the filled pits. The material filling each pit is not removed and remains in place to define the respective pillars. Two or more pillars are formed within the trench for each inkjet nozzle chamber. Alternatively pillars are formed by depositing material into the underside trench and performing photoimaging processes.

Abstract: The present invention generally relates to a method of forming a graded junction within a semiconductor substrate. A first masking pattern having a first opening characterized by a first lateral dimension is formed over the semiconductor substrate. The semiconductor substrate is doped with a first dopant, using the first masking pattern as a doping mask, thereby forming a first dopant region in the semiconductor substrate underlying the first opening. The first masking pattern is swelled to decrease the first lateral dimension of the first opening to a second lateral dimension. The semiconductor substrate is then doped with a second dopant, using the swelled first masking pattern as a doping mask, thereby forming a second dopant region in the semiconductor substrate, and furthermore defining a graded junction within the semiconductor substrate.

Abstract: A method of forming a TFT-LCD device with a rough pixel electrode. The method includes the following steps. A first metal layer is formed on a substrate. A first etching procedure is performed to etch the first metal layer to define a gate structure. A first insulating layer is formed on the gate structure and the substrate. A semiconductor layer is formed on the first insulating layer above the gate structure. A second metal layer is formed on the first insulating layer and the semiconductor layer. A second etching procedure is performed to etch the second metal layer to define drain/source structures. A passivation layer is formed on the drain/source structures. A pixel electrode, having a rough surface caused by at least one set of bumps formed above the substrate, is formed on the passivation layer to electrically connect the source structure.

Abstract: An operating method of a semiconductor etcher includes three steps. The first step is to provide a first power for shortening a warm-up time of the etcher. The second step is to provide a second power, which is lower than the first power, to perform an etching process. The third step is to provide a third power, which is between the first and second power, for cleaning the etcher.

Abstract: Copper or a copper alloy is removed by chemical-mechanical planarization (CMP) in a slurry of an oxidizer, an oxidation inhibitor, and an additive that appreciably regulates copper complexing with the oxidation inhibitor.

Abstract: Washing a microelectronic substrate with an ozonated solution following planarization and proceeding removal of a native oxide layer through acid etching.

Abstract: A method of manufacturing a silicon wafer with robust gettering sites and a low concentration of surface defects is provided. The method comprises adding polycrystalline silicon to a crucible; adding a nitrogen-containing dopant to the crucible; heating the crucible to form a nitrogen-doped silicon melt; pulling a silicon crystal from the melt according to the Czochralski technique; forming a silicon wafer from the silicon crystal, wherein the silicon wafer includes a front surface and a back surface; placing the silicon wafer into a deposition chamber; heating the wafer; and simultaneously depositing an epitaxial first film of a desired compound onto the front surface of the wafer and a second film of the desired compound onto the back surface of the wafer.

Abstract: A method of self-trimming pattern, includes forming a pattern containing a plurality of regular or irregular features within a first material deposited on a substrate, depositing a conformal layer of second material, and etching the second material to form spacers of the second material along the sidewalls of the features in the first material.

Abstract: A method for the production of a semiconductor wafer having a front and a back and an epitaxial layer of semiconductor material deposited on the front, includes the following process steps: (a) preparing a substrate wafer having a polished front and a specific thickness; (b) pretreating the front of the substrate wafer in the presence of HCl gas and a silane source at a temperature of from 950 to 1250 degrees Celsius in an epitaxy reactor, the thickness of the substrate wafer remaining substantially unchanged; and (c) depositing the epitaxial layer on the front of the pretreated substrate wafer.

Abstract: Planarizing machines, carrier heads for planarizing machines and methods for planarizing microelectronic-device substrate assemblies in mechanical or chemical-mechanical planarizing processes. In one embodiment of the invention, a carrier head includes a backing plate, a bladder attached to the backing plate, and a retaining ring extending around the backing plate. The backing plate has a perimeter edge, a first surface, and a second surface opposite the first surface. The second surface of the backing plate can have a perimeter region extending inwardly from the perimeter edge and an interior region extending inwardly from the perimeter region. The perimeter region, for example, can have a curved section extending inwardly from the perimeter edge of the backing plate or from a flat rim at the perimeter edge. The curved section can curve toward and/or away from the first surface to influence the edge pressure exerted against the substrate assembly during planarization.

Abstract: The present invention provides a method for preparing epitaxial-substrate, for growing a multilayered structure of GaN based semiconductor layers on the epitaxial-substrate so as to construct a semiconductor device such as blue-emitting laser diode and LED. The method for preparing the epitaxial-substrate encompasses (a) growing a first GaN based semiconductor layer on a bulk-substrate; (b) growing an InGaN based semiconductor layer on the first GaN based semiconductor layer; (c) growing a second GaN based semiconductor layer on the InGaN based semiconductor layer; and (d) separating the second GaN based semiconductor layer from the first GaN based semiconductor layer to provide the epitaxial-substrate. The epitaxial-substrate having a high crystallographic perfection and an excellent surface morphology is obtained simply and in a short time. The defect density of the single crystalline GaN based semiconductor layer film grown on the epitaxial-substrate is greatly reduced.

Abstract: At least one layer of a dielectric material 3 is deposited on a copper track 1 covered with an encapsulation layer 2. A cavity 6 is etched in the layer of dielectric material at the location of the future vertical connection. At least one protective layer is deposited in said cavity to preclude diffusion of copper 7. The protective layer 7 at the bottom of the cavity 6 is subjected to an anisotropic etching treatment and also the encapsulation layer 2 is subjected to etching, whereafter the cavity is filled with copper. The copper particles pulverized during etching the encapsulation layer do not contaminate the dielectric material 3.

Abstract: The method of the present invention is capable of manufacturing a thin film head, which includes a protection layer having enough corrosion-resisting property and water-repellent property, which is capable of keeping the magnetic head clean even if temperature and humidity are high, and which has enough durability and reliability. The method of manufacturing the thin film head, in which a pad, which contacts a disk, and a floating pattern are formed in a disk-side face, comprises the steps of: forming a adhesion layer on the disk-side face of a substrate, which is a main body of the thin film head; forming a protection layer on the adhesion layer; coating the protection layer with resist; patterning the resist so as to form a pad hole at a prescribed position, at which the pad is formed; forming a pad film on resist-coated faces including an inner face of the pad hole; and lifting off the resist so as to form the pad.