Patents Examined by Brain Young
  • Patent number: 6617992
    Abstract: A method and apparatus are arranged for minimizing the effects of capacitor mismatch errors in pipelined analog-to-digital converters (ADC). The virtual elimination of capacitor mismatch effects is achieved without trading comparator-offset margin by an appropriate selection of comparator circuits' reference signals and the inclusion of a plurality of capacitors that are switched into an appropriate feedback position. The appropriate feedback position in the switched capacitor amplifier circuit is determined based on the operating region. For each of k pipeline stage, a method includes: determining an operating region of a sampled analog input signal for a predetermined transfer curve, and computing digital code bits and an improved residue signal for this stage based on the determined operating region, and then computing a final conversion code from the digital code bits of the k pipeline stages.
    Type: Grant
    Filed: December 9, 2002
    Date of Patent: September 9, 2003
    Assignee: National Semiconductor Corporation
    Inventor: Satoshi Sakurai
  • Patent number: 6340941
    Abstract: A digital-signal forming circuit demodulates a time-divisionally received signal, and shapes the demodulated signal by comparing the demodulated signal with a reference voltage. When a non-receiving time slot has a small interference signal, the digital-signal forming circuit uses, as the reference voltage, a direct-current voltage obtained by averaging the demodulated signal. When the non-receiving time slot has a large interference signal, the digital-signal forming circuit uses a predetermined direct-current voltage as the reference voltage.
    Type: Grant
    Filed: November 17, 1999
    Date of Patent: January 22, 2002
    Assignee: Alps Electric Co., Ltd.
    Inventors: Yoshinori Miura, Hideo Izumi
  • Patent number: 6222476
    Abstract: A system and method for reduced metastability errors in an analog-to-digital converter (“ADC”) are disclosed. The ADC comprises comparators configured to output a thermometer code and a thermometer-to-binary encoder for converting the thermometer code to a digital output.
    Type: Grant
    Filed: August 30, 1999
    Date of Patent: April 24, 2001
    Assignee: LSI Logic Corporation
    Inventors: Sang-Soo Lee, Tzu-Wang Pan
  • Patent number: 6166669
    Abstract: A noise-immune electronic circuit includes an input circuit for receiving an inbound signal through an input transmission line and comparing the inbound signal with a decision threshold to produce input data of the electronic circuit having one of predefined discrete levels depending on relative magnitudes of the inbound signal and the decision threshold and an output circuit for receiving output data of the electronic circuit and producing therefrom an outbound signal and forwarding the outbound signal onto an output transmission line. The input and output transmission lines are inductively coupled together so that a noise is introduced to the received inbound signal when a voltage transition occurs in the forwarded outbound signal.
    Type: Grant
    Filed: March 29, 1999
    Date of Patent: December 26, 2000
    Assignee: NEC Corporation
    Inventor: Kazutaka Miyano