Abstract: Metric values derived from levels of indenture are used by producers to address statistically critical errors effecting producibility. The invention provides a machine implemented diagnostic method for determining the severity of an initial failure, predicts the severity of side effects of the failure and its correction, and gauges the overall effect the failure has on producibility.

Abstract: A model predictive controller for a process control system which includes a real-time executive sequencer and an interactive modeler. The interactive modeler includes both a process model and an independent disturbance model. The process model represents the dynamic behavior of the physical process, while the disturbance model represents current and future deviations from the process model. The interactive modeler estimates current process states from the process model and input data received from the executive sequencer. The executive sequencer then projects a set of future process parameter values, which are sought to be controlled, over a predetermined control horizon. The interactive modeler then solves a set of equations as to how the physical process will react to control changes in order to determine an optimized set of control changes. As a result, the process control system will be able to accurately track a predetermined set-point profile in the most effective and cost efficient manner.

Abstract: A system for configuring a second biomedical device in the same configuration as a first device. The first device is configured as desired and then is connected through a communication link to the second device to be configured. A teach mode is invoked in the first device and a learn mode invoked in the second device. The first device receives identification data from the second device, such as the model number and software revision number. If acceptable, the first device compares individual parameters against default values. The first device then sends only those parameters which differ from the default values. The second device will then load these parameters plus the default value of the other parameters. Both devices will indicate a successful transfer of data by means of a display. If the identification data do not match, the first device will provide a prompt and no configuration data will be sent to the second device.

Abstract: A cyclic redundancy check synchronizer includes an N-byte shift register for shifting an input byte string by N bytes and N-1 bytes, a compensation polynomial driver for driving a compensation polynomial by modulo-2-dividing bits of a byte output from the Nth stage of the N-byte shift register by a generator polynomial and shifting the resultant remainder by one bit in a direction toward higher-order bits, and a calculator for inputting bits of an output byte from a remainder register as high-order bits and bits of an input data byte as low-order bits and for performing compensation polynomial modulo-2 subtraction and generator polynomial modulo-2 division for the inputted bits.

Abstract: A storage controller operates an array of parity protected data storage units as a RAID level 5. One of the storage units is a dedicated write assist unit. The assist unit is a temporary storage area for data to be written to the other units. When the array controller receives data from a host, it first writes the data to the assist unit. Because the assist unit is not parity protected and is only temporary storage, it is possible to write data to the assist unit sequentially, without first reading the data, greatly reducing response time. The array controller signals the CPU that the data has been written to storage as soon as it has been written to the assist unit. Parity in the array is updated asynchronously. In the event of system or storage unit failure, data can be recovered using the remaining storage units and/or the assist unit. The write assist unit also doubles as a spare unit.

Abstract: An inventory control procedure which supplies materials at various stations along an assembly line without providing excess amounts of these materials.

Abstract: A multiplier calculates a product S'(x)=S(x).multidot..lambda.(x) mod X.sup.d-1 of a syndrome polynomial S(x) generated by a syndrome generator and an erasure position polynomial .lambda.(x) generated by an erasure position polynomial generator, modulo X.sup.d-1. A constant multiplier sequentially multiplies coefficients of the polynomial S'(x) and the erasure position polynomial .lambda.(x) with a power of a primitive root .alpha. of a code. The power exponents in this multiplication are determined in units of coefficients. Every time this multiplication is executed, an adder sequentially adds predetermined combinations of products. A plurality of arithmetic and logic operations according to the numbers of correctable erasures and errors are sequentially executed using the sums. A divisor and dividend are selected in accordance with the number of erasures included in the code on the basis of the plurality of arithmetic and logic operation results.

Abstract: A flexible method for characterizing polymer components and the use of the same in general purpose polymer process simulation software has been developed. In this method and software apparatus, polymer molecules are defined in terms of their segments or structural units. In addition, a set of component attributes is associated with each polymer component. The component attributes are used to track information on polymer molecular structure, chemical composition and product properties, such as molecular weight averages, average copolymer composition, particle size distribution, etc. This methodology is used in a consistent manner by all key elements of simulation software, such as thermo-physical property calculations and polymerization kinetics.

Abstract: This invention relates to a method and apparatus for controlling the speed of a washing machine motor by varying the number of revolutions and changing direction of rotation of the motor to control the water current of the washing machine. The invention detects the actual speed of the washing machine motor at every half cycle of ordinary use power frequency, determines speed error by comparing the detected actual speed with an ordered speed, determines a speed state from the speed error, calculates a proportional integration value according to the determined speed state, and scales the calculated proportional compensation value into an angular value. The washing machine's motor speed is controlled using the scaled angular value.

Abstract: A database of reversion cure constants is provided by measuring a physical property of a rubber formulation at two different temperatures as a function of time, calculating a set of cure constants for the rubber formulation which account for reversion, and storing the constants for later use either to optimize cure for a given process or of a given compound, or to assure quality of a raw compound. The invention also provides a curing press for optimizing cure including a mold, a heater, a temperature transducer, a computer and the database.

Abstract: To enable the free setting of an acceleration and deceleration pattern free from the amount of movement and the movement time a numerical control method controls the operation of a controlled object by a target function. The method which computes the target function Y(t) by an amount of change .DELTA.Y.sub.t, a normalized target function y(t), and correction values .beta., .delta.

Abstract: An improved error control coding scheme is implemented in low bit rate coders in order to improve their performance in the presence of transmission errors typical of the digital cellular channel. The error control coding scheme exploits the nonlinear block codes (NBCs) for purposes of tailoring those codes to a fading channel in order to provide superior error protection to the compressed half rate speech data. For a half rate speech codec assumed to have a frame size of 40 ms, the speech encoder puts out a fixed number of bits per 40 ms. These bits are divided into three distinct classes, referred to as Class 1, Class 2 and Class 3 bits. A subset of the Class 1 bits are further protected by a CRC for error detection purposes. The Class 1 bits and the CRC bits are encoded by a rate 1/2 Nordstrom Robinson code with codeword length of 16. The Class 2 bits are encoded by a punctured version of the Nordstrom Robinson code. It has an effective rate of 8/14 with a codeword length 14.

Abstract: A valve position controller (10) for controlling the position of an industrial-valve element (29, 29') includes a check valve (72, 74) in each of closing and opening pressurized-fluid input lines (68, 70) for respectively leading pressurized fluids from a pressurized source (30) to closing and opening solenoid actuating valves (106, 104) via a common input fork (62). The valve position controller can be changed between a fail-in-place" mode, and a "fail-closed" mode by interchanging input and exhaust lines (68, 88) to an opening actuating valve (64) and reversing electrical operation of a solenoid (104) of the opening actuating valve. A needle valve (94) in a common exhaust line allows speed of the system to be optimized for a set resolution.

Abstract: A circuit and method includes a global parity symbol in a multi-way interleaved Reed-Solomon code implementation to enhance error-detection capability of the Reed-Solomon code. In one embodiment, the global parity symbol is computed over both the data symbols and the check symbols of the Reed-Solomon code, thereby providing data detection capability for errors occurring in the check symbols.

Abstract: A single module for performing polynomial arithmetic operations over finite fields is provided in an error correcting system for correcting Reed-Solomon codewords with mixtures of errors and erasures in an optical disk storage. The module comprises two-dimensional register arrays, which serve as a working area to store initial data and intermediate results of the polynomial operations. A set of multiplier-adder units performs multiplication and addition operations under the data supplied from the register arrays based on finite field arithmetic over the Galois field GF(2.sup.8). A set of multiplexers routes the input data to the corresponding multiplier-adder units depending on the polynomial functions to be performed. In response to initial condition signals, a control system determines what polynomial functions are to be performed by the polynomial processing module and supplies the module with control signals to provide the data control in the register arrays and selection of the multiplexers.

Abstract: In a round baler having a microprocessor based controller for controlling the pattern in which twine is wrapped around a bale, factory installed programs, selectable by an operator through actuation of control keys, provide a plurality of twine wrap patterns each of which includes two wraps at each end of the bale. An operator's panel is provided with keys which, when actuated, modify the number of end wraps. The factory installed programs are not otherwise modified. When a factory installed program is selected, the number of end wraps placed on each end of the bale is determined by the modified number of end wraps.

Abstract: An ARQ data transmission scheme in which the overhead due to the ARQ control data is reduced to resolve the problem of the throughput deterioration. The error correction code for the original data is used for each re-transmission block or sub-block, and the block or sub-block corresponding to each re-transmission block or sub-block is found by carrying out the error correction operation with respect to each block or sub-block to be re-transmitted which is stored in the memory, so that there is no need to include the block or sub-block number for identifying each block or sub-block in the re-transmission frame, and consequently the ratio of the ARQ control data with respect to the transmission data can be made relatively smaller and the throughput can be improved.

Abstract: In variable bit rate communications in which the information rate changes at B/2.sup.n (where n is 0 or a positive integer) in each frame when the maximum information rate is B, at the transmitter side, information data is convolution coded in order to carry out an error correction of the information data, and when n.gtoreq.1, coded data is repeatedly transmitted by (2.sup.n -1) times. At the receiver side, the information rate is detected from the transmission data that has been received, and when carrying out Viterbi decoding, an information rate is estimated by utilizing the repetition characteristics of the data, so that the coded data is Viterbi decoded for only the estimated bit rate, to thereby restrict an increase in the power consumption of mobile terminal units that are driven by batteries.

Abstract: Methods and apparatus for encoding and/or decoding digital data elements of a uniform size with different degrees of error protection in accordance with a quasi-product code.

Abstract: A code generation system to construct an asynchronous real-time controller for a real-time system with asynchronous subsystems is described. The system includes a software user interface to specify a functional description of a real-time system with asynchronous subsystems. The software user interface includes code construction elements selected from a functional library with a corresponding menu. The menu includes a start-up procedure selection option used to initialize parameters associated with the real-time system, a background procedure selection option to specify a control action to be executed in relation to the real-time system, and an interrupt procedure selection option to specify an operation to be performed in response to an asynchronous interrupt signal. Each of the selection options include a variable block definition tool to read and write values to global variables.