Patents Examined by Bruce R. Smith
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Patent number: 12002813Abstract: A method for forming an SOI substrate is provided. The method includes following operations. A recycle substrate is received. A first multilayered structure is formed on the recycle substrate. A trench is formed in the first multilayered structure. A lateral etching is performed to remove portions of sidewalls of the trench to form a recess in the first multilayered structure. The trench and the recess are sealed with an epitaxial layer, and a potential cracking interface is formed in the first multilayered structure. A second multilayered structure is formed over the first multilayered structure. The device layer of the recycle substrate is bonded to an insulator layer over an carrier substrate. The first multilayered structure is cleaved along the potential cracking interface to separate the recycle substrate from the second multilayered structure, the insulator layer and the carrier substrate. The device layer is exposed.Type: GrantFiled: August 30, 2021Date of Patent: June 4, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Yu-Hung Cheng, Ching I Li, Chia-Shiung Tsai
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Patent number: 12002758Abstract: A method of fabricating a semiconductor device comprises forming backside power rails in a dielectric layer arranged above a backside interlayer dielectric (BILD) layer or a semiconductor layer, forming a trench that extends through the BILD layer or the semiconductor layer and partly through the dielectric layer between the backside power rails, depositing a plurality of layers to form a backside metal-insulator-metal (MIM) capacitor in the trench, and forming a first contact to a first metal layer of the plurality of layers. Forming the first contact comprises forming first recesses in a second metal layer of the plurality of layers, and filling the first recesses with an insulative material. The method further comprises forming a second contact to the second metal layer. Forming the second contact comprises forming second recesses in the first metal layer, and filling the second recesses with the insulative material.Type: GrantFiled: November 4, 2021Date of Patent: June 4, 2024Assignee: International Business Machines CorporationInventors: Ruilong Xie, Takeshi Nogami, Roy R. Yu, Balasubramanian Pranatharthiharan, Chih-Chao Yang
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Patent number: 11990487Abstract: A reflective member having transflective and substantially opaque regions is disclosed. The transflective region may serve as a sensor opening region. When viewing the member from a first direction, the difference between a total light reflectance of the member at the substantially opaque region and at the sensor opening region is less than five percent. Additionally, when viewing the member from the first direction, the difference between a color reflectance of the member at the substantially opaque region and at the sensor opening region is less than 5 delta C* units. A sensor disposed in a second direction of the sensor opening region of the member is operable to receive light through the member at the sensor opening region. The second direction is opposite the first direction.Type: GrantFiled: April 22, 2021Date of Patent: May 21, 2024Assignee: GENTEX CORPORATIONInventors: Brian R. Olson, George A. Neuman, Mario F. Saenger Nayver, John S. Anderson
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Patent number: 11984404Abstract: A semiconductor device includes a stack structure including interlayer insulating layers and horizontal layers on a lower structure; a memory vertical structure vertically penetrating the stack structure; first and second barrier structures penetrating the stack structure in parallel; a supporter pattern penetrating the stack structure; and through contact plugs penetrating the stack structure. The first barrier structure includes first barrier patterns arranged in a first direction and spaced apart from each other, and second barrier patterns arranged in the first direction and spaced apart from each other. Each of the first and second barrier patterns includes a linear shape extending in the first direction. In a first barrier pattern and a second barrier pattern adjacent to each other, a portion of the first barrier pattern opposes a portion of the second barrier pattern in a second direction perpendicular to the first direction.Type: GrantFiled: July 13, 2021Date of Patent: May 14, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sujin Park, Heesung Kam, Byungjoo Go, Hyunju Sung
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Patent number: 11961856Abstract: An image sensing device includes a first unit pixel block, a second unit pixel block, and an isolation transistor. The first unit pixel block includes a first common floating diffusion node, first photoelectric conversion elements, first transfer transistors and a first conversion gain transistor configured to change capacitance of the first common floating diffusion node. The second unit pixel block adjacent to the first unit pixel block includes a second common floating diffusion node, second photoelectric conversion elements, second transfer transistors and a second conversion gain transistor configured to change capacitance of the second common floating diffusion node. The isolation transistor located in a boundary region between the first unit pixel block and the second unit pixel block isolates the first conversion gain transistor and the second conversion gain transistor from each other.Type: GrantFiled: June 3, 2021Date of Patent: April 16, 2024Assignee: SK HYNIX INC.Inventor: Pyong Su Kwag
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Patent number: 11948937Abstract: A semiconductor integrated circuit includes: a semiconductor base body of a first conductivity-type; a bottom surface electrode to which a first potential is applied, the bottom surface electrode being provided on a bottom surface of the semiconductor base body; a first well of a second conductivity-type to which a second potential lower than the first potential is applied, the first well being provided on a top surface side of the semiconductor base body; a second well of the first conductivity-type provided in the first well; and an edge structure provided in the first well and configured to supply a third potential higher than the second potential to the second well.Type: GrantFiled: April 23, 2021Date of Patent: April 2, 2024Assignee: FUJI ELECTRIC CO., LTD.Inventor: Yoshiaki Toyoda
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Patent number: 11882749Abstract: A display substrate, a display panel, and a display device are disclosed. The display substrate includes first and second display regions and sub-pixels. The sub-pixels are divided into first-type and second-type pixel groups arranged in a second direction. The first-type pixel group includes first and second sub-pixels located in the first and second display regions. The second-type pixel group includes second sub-pixels. The second sub-pixels of at least one of the first-type and the second-type pixel groups are disposed at two sides of the first display region in a first direction. The pixel circuits corresponding to the first and second sub-pixels in one first-type pixel group are connected to one first-type data line. The pixel circuits corresponding to the second sub-pixels in one second-type pixel group are connected to one second-type data line. A power line is disposed below a first-type data line in the first display region.Type: GrantFiled: June 21, 2021Date of Patent: January 23, 2024Inventors: Chuanzhi Xu, Zhengfang Xie, Lu Zhang, Junhui Lou