Patents Examined by Chen M. Fan
  • Patent number: 7272192
    Abstract: A method for diversity transmission and reception for channels with intersymbol interference is created. With this method one can transmit from two or more antennas in such a way that a receiver with one or more antennas can benefit from the diversity offered by the difference in channels from the transmit antennas to the receiver antenna(s). The way the transmission and reception is organized makes it relatively simple to in the receiver detect the transmitted symbols despite intersymbol interference in the channel. Due to the increased diversity experienced by the receiver the average power level required at the receiver is reduced which can be used to increase the capacity or coverage of a wireless network and/or reduce the required transmitted power.
    Type: Grant
    Filed: April 11, 2001
    Date of Patent: September 18, 2007
    Assignee: Board of Trustees of the Leland Stanford Junior University
    Inventors: Erik D. Lindskog, Arogyaswami J. Paulraj
  • Patent number: 7187742
    Abstract: A digital clock manager is provided. The digital clock manager generates an output clock signal that causes a skewed clock signal to be synchronized with a reference clock signal. Furthermore, the digital clock manager generates a frequency adjusted clock signal that is synchronized with the output clock signal during concurrence periods. The digital clock manager includes a delay lock loop and a digital frequency synthesizer. The delay lock loop generates a synchronizing clock signal that is provided to the digital frequency synthesizer. The output clock signal lags the synchronizing clock signal by a DLL output delay. Similarly, the frequency adjusted clock signal lags the synchronizing clock signal by a DFS output delay. By matching the DLL output delay to the DFS output delay, the digital clock manager synchronizes the output clock signal and the frequency adjusted clock signal.
    Type: Grant
    Filed: October 6, 2000
    Date of Patent: March 6, 2007
    Assignee: Xilinx, Inc.
    Inventors: John D. Logue, Andrew K. Percey, F. Erich Goetting