Patents Examined by Christopher R. Glombocki
  • Patent number: 5406511
    Abstract: Memory cells are formed at mutually facing areas of conductive layers arranged in parallel in a lateral direction and conductive layers arranged in a direction orthogonal to the lateral direction. A plurality of capacitors are formed, as a matrix array, at those mutually facing area of the conductive layers crossing relative to each other in the mutually orthogonal relation. Each capacitor constitutes a memory cell. A plurality of capacity levels, each, are set as a corresponding capacitor level by varying a mutually facing area between the conductive layers.
    Type: Grant
    Filed: August 10, 1993
    Date of Patent: April 11, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kazutaka Nogami