Patents Examined by Craig Steven Miller
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Patent number: 6856936Abstract: Systems and methods to identify an event(s) representing a discontinuity in the impedance of a transmission line such as a wire cable using time domain reflectrometry (TDR) are presented. According to an exemplary embodiment, multiple layers of digital signal processing techniques are implemented in an algorithm that combats the smearing effect of a wide launch pulses with the reflection due to an event. The algorithm focuses on wavelet decomposition and additional post processing to produce a well-defined signal that allows easy identification of the reflected signal while preserving critical information, such as the location of the event and relative signal strength.Type: GrantFiled: July 31, 2002Date of Patent: February 15, 2005Assignee: Turnstone Systems, Inc.Inventors: Franz Chen, Kuo-Chung Lin
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Patent number: 6826500Abstract: A system and computer implemented method for enabling field service of machines and training of field service personnel. The method comprises the steps of generating at least one validated sequence of instructions for at least one maintenance task and delivering the at least one validated sequence for use in performing the at least one maintenance task.Type: GrantFiled: June 29, 2001Date of Patent: November 30, 2004Assignee: General Electric CompanyInventors: Steven Eric Linthicum, Russell Scott Blue, Christopher Richard Volpe, Craig Arthur Silber, Boris Yamrom, Louis John Hoebel, Tomek Strzalkowski
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Patent number: 6816794Abstract: The present invention provides apparatus for interactively observing metal or other electrolyte contamination of a product against a reference datum or calibration signal for that product; and modifying the datum signal on line to reflect changes in tolerances between the calibration and observed signals. The method can be used to optimise the calibration signal for a given product; or can be used to identify specific contaminants based upon their effect on the calibration signal. The invention enables an operator to optimise the calibration signal inter actively and thus reduce inaccuracies in the detection of contaminated products due to incorrect tolerances between the calibration and observed signals.Type: GrantFiled: November 18, 2002Date of Patent: November 9, 2004Assignee: Videojet Technologies, Inc.Inventor: Khalid Naser Alvi
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Patent number: 6810336Abstract: A torque sensor includes first and second shafts, an elastic shaft, a magnet, a pair of ring plates, and a magnetic sensor. The elastic shaft connects the first and second shafts coaxially. The magnet is fixed to the first shaft. The pair of ring plates is fixed to the second shaft, and faces each other in an axial direction of the elastic shaft so that the pair of ring plates sandwiches the magnet. The magnetic sensor is disposed in a gap between the pair of ring plates so that the magnetic sensor detects a magnetic flux density in the gap. Each ring plate includes a convexity and a concavity in an inner circumference of each ring plate, respectively. The pair of ring plates is rotatable against the magnet in accordance with a twist of the elastic shaft so that the rotation of the ring plates causes the magnetic flux density in the gap.Type: GrantFiled: March 26, 2003Date of Patent: October 26, 2004Assignee: Denso CorporationInventors: Naoki Nakane, Shigetoshi Fukaya, Kenji Takeda
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Patent number: 6807505Abstract: An electronic circuit comprises a plurality of input/output (I/O) nodes for connecting the electronic circuit to a further electronic circuit via interconnects. A main unit implements a normal mode function of the electronic circuit. A test unit tests the interconnects. The electronic circuit has a normal mode in which the I/O nodes are logically connected to the main unit and a test mode in which the I/O nodes are logically connected to the test unit. In the test mode the test unit is operable as a low complexity memory via the I/O nodes.Type: GrantFiled: July 16, 2003Date of Patent: October 19, 2004Assignee: Koninklijke Philips Electronics N.V.Inventors: Franciscus G. M. De Jong, Mathias N. M. Muris, Robertus M. W. Raaijmakers, Guillaume E. A. Lousberg
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Patent number: 6804616Abstract: A method is described for computing the power consumption of a device. The method comprises (1) determining the number and type of each of a plurality of components comprising a system, (2) determining a component power consumption for each of the plurality of components, and (3) determining a device power consumption by summing the component power consumptions of all of the plurality of components. A rack holds multiple systems, provides power to the systems and cool air to remove thermal energy from the systems. Power and cooling requirements for a rack are determined by (1) determining the number and type of components comprising each of the plurality of systems, (2) determining component power consumption for each of the plurality of components, (3) determining a system power consumption for each system by summing the component power consumptions of all components in each system, and (4) determining a rack power consumption by summing the system power consumptions for all systems.Type: GrantFiled: December 13, 2001Date of Patent: October 12, 2004Assignee: Intel CorporationInventor: Devadatta V. Bodas
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Patent number: 6799144Abstract: A method, apparatus, and article of manufacture for analyzing measurements. The invention provides a method for separating and analyzing the components of a distribution, such as deterministic and random components. The method performs the steps of collecting data from a measurement apparatus, constructing a histogram based on the data such that the histogram defines a distribution, fitting tails regions wherein deterministic and random components and associated statistical confidence levels are estimated.Type: GrantFiled: June 27, 2001Date of Patent: September 28, 2004Assignee: Wavecrest CorporationInventors: Peng Li, Ross Adam Jessen, Jan Brian Wilstrup, Dennis Petrich
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Patent number: 6792379Abstract: Integrated circuit chips can have a programmable data reference table that provides information required for circuit blocks on the chip to attain a desired performance, such as a certain power consumption and/or clock speed. The information entered into this table is based on data obtained from actual tests performed on the chip either when it is on a wafer or after it has been cut from the wafer. The tests determine the clock rates, supply voltages, and back-bias voltages at which the chip can successfully execute a program.Type: GrantFiled: April 24, 2002Date of Patent: September 14, 2004Inventor: Yoshiyuki Ando
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Patent number: 6782327Abstract: A method and apparatus for obtaining accurate measuring of material a system where stopping element which stops feeding the material has a time delay which takes a certain time to stop the feeding completely after receiving a stopping signal. The apparatus includes feeding line which is capable of changing feeding rate from high to low when a total fed amount reaches a predetermined alerting amount, preset amount calculator for determining the current preset amount value by multiplying the time delay by a detected feeding rate and a controller for generating a signal to actuate the stopping element to stop the feeding when the total fed amount reaches a value of difference between the intended amount and the current preset amount.Type: GrantFiled: August 28, 2001Date of Patent: August 24, 2004Assignee: Fuji Photo Film Co., Ltd.Inventor: Sakae Nishijima
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Patent number: 6775639Abstract: A vehicle alignment gauging system measures a linear dimension and generates an output signal corresponding to the measured linear dimension. A storage device stores reference data corresponding to standard reference dimensions for a selected vehicle, and a comparator compares the output signal with a selected reference dimension from the storage means and generates an error signal indicative of the variation therebetween. A visual indication of the magnitude of the variation is provided thereby to provide a quantitative indication of structural misalignment in use.Type: GrantFiled: May 9, 2001Date of Patent: August 10, 2004Inventor: James Herbert Mason
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Patent number: 6768953Abstract: In an odd side storage circuit, logical values of a decision subject signal HCMP are stored in first and second FFs respectively at decision edges LH and HL generated from odd-numbered edges of a decision edge EH. Logical values of a delayed decision subject signal HCMP′ are stored in third and fourth FFs. According to a selection signal generated by a selection signal generation circuit based on outputs of the third and fourth FFs, a first selector selects an output of the first or second FF. An even side storage circuit operates similarly at even-numbered edges. A second selector selects the odd and even side storage circuits alternately. The FFs in the odd and even side storage circuits are reset by a decision edge LH′ of the even side and the decision edge HL of the odd side, respectively.Type: GrantFiled: October 10, 2002Date of Patent: July 27, 2004Assignee: Hitachi, Ltd.Inventors: Fujio Oonishi, Kenichi Shinbo, Ritsuro Orihashi, Masashi Fukuzaki, Nobuo Motoki
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Patent number: 6766262Abstract: Methods for determining a corrected intermodulation distortion (IMD) product measurement for a device under test (DUT) are provided. A ratioed receiver IMD product is measured, where the receiver IMD product results from non-linearities in a receiver. Next, a ratioed composite IMD product is measured, where the composite IMD product results from non-linearities in both the receiver and the DUT. The corrected DUT IMD product (DUTP) can then be determined by subtracting the ratioed receiver IMD product from the ratioed composite IMD product to remove the effects of IMD due to the receiver.Type: GrantFiled: May 29, 2002Date of Patent: July 20, 2004Assignee: Anritsu CompanyInventor: Jon S. Martens
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Method and apparatus to facilitate measurement of quality-of-service performance of a network server
Patent number: 6763321Abstract: One embodiment of the present invention provides a system that facilitates measuring quality-of-service of a computer network server or collection of servers by determining the effect that transactions in one category of service have on transactions in other categories of service. The system operates by generating a varying pattern of synthetic transactions for one category of service and a fixed pattern of synthetic transactions for the other categories of service. The system sends the varying pattern and the fixed pattern of synthetic transactions and receives responses to these patterns across a network between the computer network servers and the synthetic transaction generator. The system measures the response time for the varying pattern of synthetic transactions and the response time for the fixed pattern of synthetic transactions. Additionally, the system calculates the effect of transactions in one category of service on response times in the other category of service.Type: GrantFiled: June 22, 2001Date of Patent: July 13, 2004Assignee: Sun Microsystems, Inc.Inventors: Kenny C. Gross, David M. Fishman -
Patent number: 6748341Abstract: Machinery diagnostics and prognostics is an emerging engineering field that seeks to accurately determine the operational health of a machine without waiting for the machine to fail, performing maintenance that may not yet be required or, in the worst case, performing unnecessary maintenance that inadvertently causes other problems and hastens machine health deterioration. Accurate prediction of machine health (operability) enables operators to base machine maintenance on the machine's actual condition, in contrast to the common practice of time-based maintenance (e.g., perform maintenance every 100 hours). The “just-in-time” methodology of the machine health monitoring system (MHMS) of the present invention translates into significant cost savings by providing early warning of impending failures and thus reducing unanticipated catastrophic machine failures through preventative maintenance techniques (but no more or no less than is required) while simultaneously keeping false alarm rates low.Type: GrantFiled: April 12, 2002Date of Patent: June 8, 2004Inventor: George E. Crowder, Jr.
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Patent number: 6728649Abstract: A method and apparatus for removing glitches, interference or noise from a clock signal are provided by the present invention. In accordance with the invention, a glitch-ridden clock signal is monitored to determine when a transition in the glitch ridden clock signal occurs. When a transition occurs, a counter is initiated in accordance with a second high-speed clock signal. The value of this counter is compared to a compare value. The compare value is selected to approximately equal the expected period of the glitch-ridden clock signal. If the counter value equals the compare value, it is assumed that the transition was a valid transition and the transition is carried through and output as a glitch-free clock signal. However, if a transition occurs before the count value equals the counter compare value, it is assumed that the transition is invalid and no transition is carried to the glitch-free clock output.Type: GrantFiled: February 1, 2002Date of Patent: April 27, 2004Assignee: ADTRAN, Inc.Inventors: Dennis B. McMahan, Jason N. Morgan, Timothy D. Rochell
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Patent number: 6701283Abstract: An apparatus for processing items of electronic equipment, such as downloading software to and/or testing PC system units, includes a rack having a plurality of cells each for accommodating a respective unit to be processed. Each location has a visible indication, e.g. a colored light, of the instantaneous processing state of the location, such as: cell empty, processing in progress, processing successfully completed, processing failed and unable to commence processing. Each cell also includes a timer to measure the period of time for which the cell has been in the state indicated by the visible indication.Type: GrantFiled: May 15, 2001Date of Patent: March 2, 2004Assignee: Dell Products L.P.Inventor: Abdelhakeem A. Hammad
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Patent number: 6697755Abstract: In an odd side storage circuit, logical values of a decision subject signal HCMP are stored in first and second FFs respectively at decision edges LH and HL generated from odd-numbered edges of a decision edge EH. Logical values of a delayed decision subject signal HCMP′ are stored in third and fourth FFs. According to a selection signal generated by a selection signal generation circuit based on outputs of the third and fourth FFs, a first selector selects an output of the first or second FF. An even side storage circuit operates similarly at even-numbered edges. A second selector selects the odd and even side storage circuits alternately. The FFs in the odd and even side storage circuits are reset by a decision edge LH′ of the even side and the decision edge HL of the odd side, respectively.Type: GrantFiled: May 31, 2002Date of Patent: February 24, 2004Assignee: Hitachi, Ltd.Inventors: Fujio Oonishi, Kenichi Shinbo, Ritsuro Orihashi, Masashi Fukuzaki, Nobuo Motoki
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Patent number: 6697762Abstract: The invention provides a computer implemented tool for analyzing the brittleness of a system with respect to at least one system performance measure. The tool comprises a statistical analyzer configured to receive at least one operating parameter input, o, and to provide at least one performance function output, f. The performance function output f provides an indication of system performance as a function of system operating parameter input o. A brittleness analyzer is coupled to the performance function output and is configured to provide a brittleness output based upon the performance function output f.Type: GrantFiled: November 9, 1999Date of Patent: February 24, 2004Assignee: General Electric CompanyInventors: Stephen Francis Bush, John Erik Hershey, Kirby Gannett Vosburgh, Brock Estel Osborn
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Patent number: 6691068Abstract: Data are collected for deriving response models and information required for developing and maintaining processes and process tools. Methods and apparatus for collecting the data include a sensor apparatus capable of collecting data with less perturbation and fewer disruptions than is usually possible using standard methods. The sensor apparatus is capable of being loaded into a process tool. From within the process tool, the sensor apparatus is capable of measuring data, processing data, storing data, and transmitting data. The sensor apparatus has capabilities for near real time data collection and communication.Type: GrantFiled: August 22, 2000Date of Patent: February 10, 2004Assignee: OnWafer Technologies, Inc.Inventors: Mason L. Freed, Randall S. Mundt, Costas J. Spanos
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Patent number: 6687641Abstract: An apparatus is disclosed for measuring, calculating, recording and monitoring significant system parameters for a local communication network of the type used in industrial automation applications. The apparatus is disclosed in the context of a network employing the DeviceNet protocol.Type: GrantFiled: January 21, 2003Date of Patent: February 3, 2004Assignee: Woodhead Industries, Inc.Inventor: Nicolas D. L. Jones