Patents Examined by Cynthia H Britt
  • Detecting faults in dual port FIFO memories
    Patent number: 6757854
    Abstract: An efficient and reliable technique is disclosed for detecting faults which occur in FIFO's, including control faults which are specific to FIFO's, as well as faults common to conventional memories, such as interport faults and faults that occur in single port memories. The technique utilizes a sequence of read, write and control operations, thereby avoiding the need to directly observe internal values within the FIFO, such as the full and empty flag values and the shift register values.
    Type: Grant
    Filed: September 16, 1999
    Date of Patent: June 29, 2004
    Assignee: LSI Logic Corporation
    Inventors: Jun Zhao, Mukesh Puri, V. Swamy Irrinki
  • Data transmission method
    Patent number: 6732313
    Abstract: A data transmission apparatus including a receiving unit for receiving transmitted packets; a priority decision unit; a retransmission packet storage unit; a retransmission instruction receiving unit for receiving a retransmission request from a terminal at the receiving end; a retransmission decision unit; a transmission queue management unit; and a transmission unit.
    Type: Grant
    Filed: June 9, 2003
    Date of Patent: May 4, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hideaki Fukushima, Seiji Horii, Tatsuya Ohnishi, Makoto Hagai, Yoshinori Matsui, Akihiro Miyazaki
  • Method for verifying and improving run-time of a memory test
    Patent number: 6704891
    Abstract: A method of generating and verifying a memory test is disclosed. A simulator is used to verify that the sequence of time-ordered commands complies with a set of operating constraints for the memory. A packer may thereafter be used to optimize run time of the verified test.
    Type: Grant
    Filed: June 2, 2003
    Date of Patent: March 9, 2004
    Assignee: Rambus Inc.
    Inventors: Steven Cameron Woo, John Philip Privitera, Mark Alan Horowitz