Patents Examined by David A. Zarnehe
  • Patent number: 6720209
    Abstract: A conductive plated layer 4 is formed after through holes 21 are formed in the insulation resin 2 by using an insulation resin sheet 1 overcoated on a single side of the conductive layer 3 with insulation resin 2. A multi-layer connection structure can be achieved by the second conductive path layer 6 which is connected, in multi layers, to the first conductive path layer 5 formed by etching the conductive plated layer 4. Further, since semiconductor elements 7 are adhered to and fixed at the overcoating resin 8 that covers the first conductive path layer 5, the first conductive path layer 5 is finely patterned, and routing thereof can be made free.
    Type: Grant
    Filed: June 14, 2002
    Date of Patent: April 13, 2004
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Yusuke Igarashi, Noriaki Sakamoto, Yoshiyuki Kobayashi, Takeshi Nakamura