Abstract: The invention provides a directional ion etching process to pattern self-aligned via contacts in the manufacture of semiconductor devices such as high density magnetic random access memory (MRAM). In a particular embodiment, a semiconductor wafer is prepared with vertically arranged layers, including a patterned layer in electrical contact with a conductive row layer. The patterned layer may be a magnetic tunnel junction layer. A photoresist is deposited on the junction layer, masked, exposed and developed. The non-protected junction layer is etched to provide appropriate junction stacks. The remaining photoresist caps are not dissolved, rather they and the surface of the wafer are coated with a dielectric. Directional ion etching at a low angle relative to the junction stack layer removes the coated photoresist caps and thereby provides at least one patterned self-aligned via contact.

Abstract: The invention simplifies the manufacturing processes and increases the yield. A semiconductor wafer equipped with a plurality of semiconductor chip forming sections is prepared. An electrical characteristic examination is conducted for each of the semiconductor chip forming sections to determine good product sections or bad product sections. At least another segmented semiconductor chip is electrically connected to each of the semiconductor chip forming sections that are determined to be good product sections.

Abstract: A silicided polysilicon based fuse device that is programmable by optical and electrical energy in the polysilicon layer without damage to nearby structures, comprising: a Si substrate; an insulating layer disposed on the substrate; and a fuse device section comprising poly-Si/a silicide/ and a barrier layer, the fuse device section forming an electrical discontinuity in the poly Si layer in response to an electrical pulse or an optical pulse applied to it.

Abstract: The invention relates to a method of depositing Hg1-xCdxTe onto a substrate, in a MOVPE technique, where 0?x?1; comprising the step of reacting together a volatile organotellurium compound, and one or both of (i) a volatile organocadmium compound and (ii) mercury vapour; characterised in that the organotellurium compound is isopropylallyltelluride. The invention also relates to devices, such as infrared sensors and solar cells, that comprise Hg1-xCdxTe materials.

Abstract: A dynamically controllable photonic crystal comprises at least one micro-cavity, and electrical means to induce carrier refraction in the vicinity of the micro-cavity. In the exemplary case when the photonic crystal is implemented in a semiconductor substrate, localized carrier refraction is achieved using field induced carrier injection or depletion into a carrier concentration column surrounding the micro-cavity. Preferably, if the substrate is silicon, the injection and depletion is achieved using various two or three terminal, unipolar or bipolar structures.

Abstract: A structure applied to a photolithographic process is provided. The structure comprises at least a film layer, an optical isolation layer, an anti-reflection coating and a photoresist layer sequentially formed over a substrate. In the photolithographic process, the optical isolation layer stops light from penetrating down to the film layer. Since the optical isolation layer is set up underneath the photoresist layer, light emitted from a light source during photo-exposure is prevented from reflecting from the substrate surface after passing through the film layer. Thus, the critical dimensions of the photolithographic process are unaffected by any change in the thickness of the film layer.

Abstract: Methods for depositing a tungsten nitride layer are described. The methods form a tungsten nitride layer using a carefully controlled deposition technique such as pulsed nucleation layer (PNL). Initially, a tungsten layer is formed on a substrate surface. The tungsten layer is then exposed to a nitriding agent to form a tungsten nitride layer. Methods of forming relatively thick layers of involve repeated cycles of contact with reducing agent, tungsten precursor and nitriding agent. In some cases, the cycle may also include contact with a dopant precursor such as phosphine or arsine.

Abstract: A bipolar transistor and its fabrication are described. The extrinsic base region is formed by growing a second, more heavily doped, epitaxial layer over a first epitaxial layer. The second layer extends under, and is insulated from, an overlying polysilicon emitter pedestal.

Abstract: A method of forming a micro groove structure according to the invention has the steps of: (a) forming a mask pattern on a substrate capable of being subjected to dry etching; (b) dry etching the substrate having the mask pattern formed thereon; (c) vapor-phase forming a thin film of a masking material for the dry etching, on a non-etched surface portion of the substrate after the dry etching; and (d) dry etching the substrate having the thin film formed thereon. The steps (a) to (d) are carried out successively.

Abstract: A method is disclosed for applying a plurality of caps to a plurality of microfabricated devices at the wafer stage. A wafer is provided-having a plurality of microfabricated devices. The method requires forming a plurality of first hollow molded caps from a layer of thermoplastic material which is placed in a mold. The mold has first and second mold halves which are brought together to form the caps. Each cap has a central portion and a perimeter wall. The caps are formed first as an array of caps in the mold. Separated caps are applied simultaneously to one side of the wafer. The first caps are attached to the wafer, and then the wafer is then eventually separated into individual chips.

Abstract: The invention includes a method of forming a crystalline phase material which includes providing a stress inducing material within or operatively adjacent a crystalline material of a first crystalline phase and annealing the crystalline material of the first crystalline phase to transform it to a second crystalline phase. The stress inducing material induces compressive stress within the first crystalline phase during the anneal to produce a more dense second crystalline phase. Example compressive stress inducing layers include SiO2 and Si3N4, while example stress inducing materials for providing into layers are Ge, W and Co. Example and preferred crystalline phase materials having two phases are refractory metal silicides, such as TiSix. The invention additionally includes incorporating the crystalline phase material into a conductive line.

Abstract: Disclosed is a method of simultaneously supplying trench isolations for array and support areas of a semiconductor substrate made of a substrate material, the method comprising providing a first hard mask layer for the array and support areas, said first hard mask comprising mask openings defining trench isolations in the array and support areas, providing deep array trench isolations in the array areas, providing a blanketing planarized conductive material layer over both support and array areas sufficient to fill said mask openings and deep array trench isolations, etching said conductive material through said first hard mask material down into said semiconductor substrate so as to form support trench isolations, such that both deep array trench isolations and support trench isolations are of equal depth, and wherein a conductive element, comprising a quantity of said conductive material, remains in the bottom of each of said deep array trenches.

Abstract: A method of directly measuring a trench depth without damages to a wafer is provided. First, the focus of a lens (LZ) of a microscope is adjusted so that a tip (TP) of a projection (PP) of a negative replica (NR) is plainly visible through the microscope, and a vertical position (A) of a stage (ST) at that time is identified. Next, with the lens (LZ) held at the same position, the stage (ST) is gradually moved toward the lens (LZ) and is stopped moving at a position where a surface (SF) of a base (BP) of the negative replica (NR) is plainly visible through the microscope. A vertical position (B) of the stage (ST) at that time is identified. Then, a difference between the vertical position (B) and the vertical position (A) is obtained to determine a distance (MD) moved, i.e., the height of the projection (PP).

Abstract: A device for intercepting droplets produced by ceiling-engaging sponges, rollers and the like is described. This portable drop cloth has a light weight framework which supports either a flat plastic sheet or a plastic bag, whichever is preferred for specific applications. The framework is attached to a collar-like member so that the unit may be positioned at a desired location along a handle of the ceiling-engaging element. In some embodiments the size of the frame, and its angular position with respect to the handle to which it is attached, may be adjusted.