Abstract: A liquid crystal display device displays images by applying an electric field substantially parallel to an insulating substrate between a pixel electrode and a common electrode placed across from each other. The liquid crystal display device has a capacitor terminal connected to the pixel electrode and placed opposite to a capacitor electrode with an insulating layer therebetween. The pixel electrode has at least two voltage supply paths to the capacitor terminal.

Abstract: A semiconductor component comprises a first semiconductor region (110, 310), a second semiconductor region (120, 320) above the first semiconductor region, a third semiconductor region (130, 330) above the second semiconductor region, a fourth semiconductor region (140, 340) above the third semiconductor region, a fifth semiconductor region (150, 350) above the second semiconductor region and at least partially contiguous with the fourth semiconductor region, a sixth semiconductor region (160, 360) above and electrically shorted to the fifth semiconductor region, and an electrically insulating layer (180, 380) above the fourth semiconductor region and the fifth semiconductor region. A junction (145, 345) between the fourth semiconductor region and the fifth semiconductor region forms a zener diode junction, which is located only underneath the electrically insulating layer. In one embodiment, a seventh semiconductor region (170) circumscribes the third, fourth, fifth, and sixth semiconductor regions.

Abstract: For fabricating an interconnect structure formed within an interconnect opening surrounded by dielectric material, a layer of diffusion barrier material is formed on at least one wall of the interconnect opening. An activation layer comprised of palladium is formed on the layer of diffusion barrier material when the interconnect opening is immersed in an activation bath comprised of tin ions and palladium ions. The tin ions have a tin ion concentration in the activation bath that is greater than a palladium ion concentration in the activation bath. A layer of seed material is deposited on the activation layer in an electroless deposition process, and the interconnect opening is filled with a conductive fill material grown from the layer of seed material. A layer of silicon rich material may be formed on the layer of diffusion barrier material before deposition of the activation layer such that the activation layer is formed on the layer of silicon rich material.

Abstract: A multilayer LC composite component is constructed for allowing for free and easy setting of an attenuation pole formed at a frequency higher than the central frequency to adjust the frequency characteristics of the LC composite component. In the multilayer LC composite component, inductor via-holes are connected in the direction in which insulation layers are stacked to constitute first to third pillar inductors. In the axial directions of the first and third inductors, input and output lead patterns are electrically connected to midpoints of the first and third inductors. A distance between a ground pattern and each of positions at which the input and output lead patterns are electrically connected to the first and third inductors is shorter than the length of each of the first and third inductors.

Abstract: A data sensing control circuit according to the present invention is provided in a semiconductor memory device with a burst access mode. The data sensing control circuit generates sensing control signals for data sensing operation by use of a transition information of an address bit signal synchronized with a read enable clock signal and used for a bank selection. According to such a data sensing control scheme, no sensing of each sensing period is performed when the read enable clock signal transitions. Therefore, a power noise (or input/output noise) issued at data-out does not affect the data sensing operation of the semiconductor memory device having the burst access mode.

Abstract: A method of forming a laterally-varying charge profile in a silicon carbide substrate includes the steps of forming a silicon nitride layer on a polysilicon layer formed on the silicon carbide substrate, and patterning the silicon nitride layer to provide a plurality of silicon nitrite layer segments which are spaced apart in the lateral direction and which are provided with openings therebetween which are of varying widths. The polysilicon layer is oxidized using the layer segments as an oxidation mask to form a silicon dioxide layer of varying thickness from the polysilicon layer and to form a polysilicon layer portion therebeneath of varying thickness. The silicon dioxide layer and silicon nitride layer segments are removed, and a dopant is ion implanted into the silicon carbide substrate using the polysilicon layer portion of varying thickness as an implantation mask to form a laterally-varying charge profile in the silicon carbide substrate.