Abstract: An integrated circuit package is provided with alignment pads which are solid or annular ring shaped. Alignment members such as balls or bullets are attached to the alignment pads via a wetting media. When heated, the wetting media serves to center and seat the alignment members on the alignment pads. When cooled, the wetting media serves to bond the alignment members to the alignment pads.

Abstract: A leadframe includes: a frame rail; a die pad, disposed inside the frame rail, for mounting a semiconductor chip thereon; and a plurality of internal inner leads, which are disposed to surround the die pad and each of which has a convex portion on the bottom thereof. The frame rail and the internal inner leads are retained by a lead retaining member on their upper and/or lower surface(s).

Abstract: A semiconductor device of chip-on-chip structure is provided which includes a first semiconductor chip and a second semiconductor chip bonded onto the first semiconductor chip in stacked relation. In one embodiment, a noise shield film is provided between the first semiconductor chip and the second semiconductor chip for shielding against a radiation noise from the second semiconductor chip. In another embodiment, a metal film is provided between the first semiconductor chip and the second semiconductor chip to provide a heat release path for releasing heat generated by the second semiconductor chip.

Abstract: A solderable flexible adhesive interposer having solderable contacts includes low-modulus-of-elasticity (i.e. molecularly flexible) conductive adhesive vias to which contacts of an electronic device, such as a semiconductor chip or die or other component, are connected. The flexible adhesive interposer substrate includes a sheet or layer of a molecularly flexible dielectric adhesive having via holes therein through which the flexible conductive adhesive vias reside. A thin layer of solderable metal, preferably a plating of gold or nickel-gold, on at least one exposed surface of the flexible conductive adhesive vias provides the solderable contacts connecting electrically to the conductive vias. The electronic device may be covered by a lid or by an encapsulant attached to the flexible adhesive interposer substrate and/or the electronic device.

Abstract: The invention relates to a process for manufacturing a structure (100) for a circuit board which comprises a plurality of supporting layers (10, 30, 60, 90), all of different materials, which supporting layers (10, 30, 60, 90) support electrically conducting patterns (20, 50, 70, 120). According to the process, the material for a first supporting layer (10) is that material which has the highest melting point of the different materials for supporting layers, subsequent to which, beginning from the first supporting layer (10), new supporting layers (30, 60, 90) are arranged successively. As material for each new supporting layer (30, 60, 90), a material is chosen with lower melting point than the supporting layer which is closest in the direction of the first supporting layer (10).

Abstract: A surface-mounting substrate, for mounting thereon a part such as a semiconductor device, which comprises a core substrate, a plurality of layers of patterned wiring lines, which are separated from each other by an insulation layer interposed therebetween, vias piercing through the insulation layer to connect the wiring lines at the adjacent layers to each other, and a layer of connecting terminals to mount a part on the surface-mounting substrate, each of the connecting terminals connecting with the wiring line at the outermost layer of wiring lines, wherein the connecting terminal is filled in an outermost insulation layer provided at the surface of the surface-mounting substrate, and has a surface exposed at substantially the same level as the level of the surface of the outermost insulation layer. A structure comprising a surface-mounting substrate and a part mounted thereon, which comprises, as the substrate used, the surface-mounting substrate of the invention, is also disclosed.

Abstract: In some embodiments, the invention includes a system having first and second modules, the first module having a first group of chips and the second module having a second group of chips, and a circuit board including first and second module connectors to receive the first and second modules, respectively. The system also includes a first buffer on the first module and a second buffer on the second module, and a path including conductors in a first section that splits into a second section and third section, wherein the second section couples to the first buffer and the third section couples to the second buffer, and wherein impedances of the second and third sections are at least 50% greater than impedances of the first section.

Abstract: In a manufacturing method of a printed circuit board comprising a process of forming a circuit pattern on the surface of the base substrate (13) of which surface is at least composed of an insulative material, a process of forming the insulative layer (15) composed of mixed composites of more than two kinds of organic resins having a different etching rate by a dry etching process on the surface of the base substrate (13) including the circuit pattern, a process of perforating the hole (17) on the insulative layer (15) by a laser beam, a process of roughing the surface of the insulative layer (15) by a dry etching process, a process of forming the conductive film (19) for a foundation of an electroplating process by a vacuum film forming method and a process of forming the conductive layer (20) on the conductive film (19) by an electroplating process so as to connect the conductive layer (20) with the circuit pattern (14) electrically.

Abstract: A window-type semiconductor package and a fabrication method thereof are provided. A substrate having an opening is mounted with at least a chip in a manner that, a conductive area of an active surface of the chip is exposed to the opening, and electrically connected to the substrate by bonding wires formed through the opening. A non-conductive material is applied over the conductive area of the chip. An upper encapsulant is formed to encapsulate the chip, and a lower encapsulant is formed to encapsulate the bonding wires and the non-conductive material. The non-conductive material interposed between the chip and the lower encapsulant helps prevent the chip from cracking at end portions thereof due to shrinkage of the lower encapsulant, and also helps secure the bonding wires in position within the opening of the substrate without causing wire-sweeping, such that reliability and yield of the semiconductor package can be assured.

Abstract: A paste for filling a throughhole, comprises: an epoxy resin; a curing agent; and a metal filler, wherein the metal filler is a powder comprising a base metal, and the curing agent is an imidazole compound represented by the following formula (1): wherein R1 represents a hydrogen atom, an alkyl group having 1 to 10 carbon atoms, a hydroxyalkyl group having 1 to 10 carbon atoms or an alkyloxy group having 1 to 10 carbon atoms.

Abstract: A kind of transient voltage suppressor structure that prevents the edge of the signal electrode from contacting with the variable impedance material by using an insulation layer to remove the point discharge existing on the edge of the signal electrode and increase the capability of the transient voltage suppressor to sustain higher transient voltage energy.

Abstract: An assembly device for an electronic component in sandwich type of construction. The electronic component includes at least one semiconductor element which is contacted in a planar fashion on its lower side and its upper side each by one circuit substrate. Using the assembly device, the two circuit substrates may be simply adjusted with respect to each other during assembly of the electronic component. For this, the assembly device includes a first lower shell including an accommodation for the first of the two circuit substrates, an arrangement for the defined alignment of the first circuit substrate in the accommodation, and a second, upper shell including an arrangement for adjusting the second circuit substrate positioned on the semiconductor element. A method for assembling an electronic component in sandwich type of construction, using such an assembly device, is also described.

Abstract: The field of the manufacture of electronic components, specifically to manufacturing flexible conductive strips having contact pads thereon, wherein a first set of alignment marks are provided on a substrate. Using the first set of alignment marks, several electronic components are formed in selected positions on the substrate. The electronic components may be formed in various groups, with a first group being formed using a first mask then, subsequent groups being formed using subsequent masks. Each of the respective masks are aligned with the first set of alignment marks in order to position the electronic components formed using the masks at the desired locations on the substrate. A second set of alignment marks are produced using the same mask as a set of electronic components that are located on the substrate. Subsequently, when a different set of features is produced, it is positioned using the second set of alignment marks located on the individual parts.

Abstract: An electronic module includes an interconnect module having a plurality of metal layers separated by a plurality of dielectric layers in a stacked structure with electronic components mounted on one surface of the module. The electronic components are selectively interconnected by drilling via holes completely through all dielectric layers with a conductive material such as solder in each via contacting metal layers to be interconnected and each metal layer which is not connected by a via having a metal pattern devoid of metal at the via location. For via connecting non-ground layers, there will be a patch of solder mask on the backside ground layer to electrically prevent this via from inadvertently connecting to ground.

Abstract: A chip with beveled edges suitable for adhering onto a surface of a die pad by an adhesive material. The chip has an active surface and a corresponding back surface, wherein the active surface has beveled edges. The back surface of the chip is adhered onto the surface of the die pad by the adhesive material.

Abstract: A reduced noise ultrasound piezo film array on a printed circuit board. A printed circuit board carries a piezo array on one end and a standard coupling at the other end. The board is made in four layers with the two external layers being ground planes to prevent noise pickup. The two internal layers carry printed circuit lines between various elements of the array and terminals of the connector. The various arrays are sequentially scanned. All of the lines except the one selected are connected to ground to prevent crosstalk and noise pickup.

Abstract: A silicone resin for sealing a semiconductor chip. A cured silicone resin, which is obtained by curing the silicone resin at a given temperature, has a percent elongation, after fracture, measured at a room temperature, not less than 4% of a penetration number at room temperature. A semiconductor device sealed with the silicone resin, when subjected to a heat cycle or a vibration test, provides resistance to cracking, forming of voids, and interfacial peeling-off. The cured silicone resin may have a penetration number not less than 10 and not more than 80 and a loss elasticity not less than 17% of the storage elasticity. A resin member made of the cured silicone resin and sealing a semiconductor chip may include a filler, such as silica or alumina, having a coefficient of linear thermal expansion lower than that of the cured silicone resin.

Abstract: The invention relates to a transponder provided with an integrated circuit, an antenna, and a first capacitor provided with a dielectric and a first and a second capacitor electrode, which transponder comprises a stack of layers, i.e.: a first layer of a dielectric material, a first patterned electrically conductive layer of which the antenna forms part, a second layer of a dielectric material, and a second patterned electrically conductive layer. The invention further relates to an appliance provided with a transponder which comprises an integrated circuit, an antenna, and a first capacitor.

Abstract: A circuit board having stable connection resistance can be obtained . The multi-layer circuit board includes the steps of making through-holes in a incompressible substrate having films on either side thereof via a bonding layer; filling conductive paste into the through-holes; removing the films from the substrate; laminating metallic foils to either side of the substrate and heating same under pressures to harden the bonding layer, bonding the metallic foils to the substrate and electrically connecting the sides of the substrate to each other; and forming a circuit pattern by machining the metallic foils.

Abstract: An adhesive-dispensing method applies a pattern of adhesive onto a circuit-board carrier such that any discontinuities in the pattern, i.e. starting-points, end-points or turning-points, are outside a footprint of a pair of substrates or MMICs intended to be attached, adjacent each other and spaced apart, to the circuit-board, and in particular outside such footprint in the area of transition between one substrate/MMIC and the other. The adhesive is preferably applied in straight lines and in a direction substantially transverse to the direction of transition between the two substrates/MMICs.