Patents Examined by Deborah Chacko-Davis
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Patent number: 9772565Abstract: An immersion liquid is provided comprising an ion-forming component, e.g. an acid or a base, which has a relatively high vapor pressure. Also provided are lithography processes and lithography systems using the immersion liquid.Type: GrantFiled: August 29, 2016Date of Patent: September 26, 2017Assignee: ASML NETHERLANDS B.V.Inventors: Hans Jansen, Marco Koert Stavenga, Jacobus Johannus Leonardus Hendricus Verspay, Franciscus Johannes Joseph Janssen, Anthonie Kuijper
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Patent number: 8652710Abstract: In a lithographic device manufacturing method, sub-resolution assist features are provided to equalize the intensities of the diffraction orders that form the image of the pattern on the substrate. In the case of bright lines against a dark field used with a positive tone resist for forming trenches at or near resolution, the assist features may comprise narrow lines equidistantly between the feature lines. In this way an improvement of exposure latitude may be obtained without reduction of DOF.Type: GrantFiled: May 25, 2007Date of Patent: February 18, 2014Assignee: ASML Netherlands B.V.Inventor: Gerald Dicker
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Patent number: 8293454Abstract: A lithographic structure comprising: an organic antireflective material disposed on a substrate; and a silicon antireflective material disposed on the organic antireflective material. The silicon antireflective material comprises a crosslinked polymer with a SiOx backbone, a chromophore, and a transparent organic group that is substantially transparent to 193 nm or 157 nm radiation. In combination, the organic antireflective material and the silicon antireflective material provide an antireflective material suitable for deep ultraviolet lithography. The invention is also directed to a process of making the lithographic structure.Type: GrantFiled: November 18, 2008Date of Patent: October 23, 2012Assignee: International Business Machines CorporationInventors: Marie Angelopoulos, Katherina E. Babich, Sean D. Burns, Allen H. Gabor, Scott D. Halle, Arpan P. Mahorowala, Dirk Pfeiffer
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Patent number: 7364838Abstract: A grayscale mask for imaging operations, including a substrate layer and a mask layer having a plurality of apertures forming a mask pattern to form a grayscale image. Each edge of each aperture includes a plurality segments forming a serrated edge, resulting in mixed edge diffraction. The apertures may be in an irregular and non-symmetric pattern and may be of variable size. A random diffusing layer may be in proximity to or integral with the substrate layer. The grayscale mask may be used for generating an optical element by printing the initial grayscale mask onto a photoresist layer and transferring the photoresist pattern onto a transparent layer and the mask may include areas or layers of variable transmission. Also described are methods for diffractive intensity averaging, diffractive error diffusion, diffractive spatial dithering, and diffractive intensity averaging.Type: GrantFiled: June 29, 2005Date of Patent: April 29, 2008Assignee: Hitachi Via Mechanics, Ltd.Inventor: Todd E. Lizotte
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Patent number: 7270942Abstract: The present invention provides an optimized direct write lithography system using optical mirrors. That is, a maskless lithography system is provided. The maskless direct-write lithography system provided uses an array of mirrors configured to operate in a tilting mode, a piston-displacement mode, or both in combination. The controlled mirror array is used as a substitute for the traditional chrome on glass masks. In order to avoid constraining the system to forming edges of patterns aligned with the array of mirrors, gray-scale techniques are used for subpixel feature placement. The direct-writing of a pattern portion may rely on a single mirror mode or a combination of modes.Type: GrantFiled: April 14, 2004Date of Patent: September 18, 2007Assignee: LSI CorporationInventors: Nicholas K. Eib, Ebo Croffie, Neal Callan
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Patent number: 7056647Abstract: A flash memory device having a reduced source resistance and a fabrication method thereof are disclosed. An example flash memory includes a cell region including a gate, a source line, a drain contact, and a cell trench area for device isolation on a silicon substrate. The example flash memory also includes a peripheral region positioned around the cell region and including a subsidiary circuit and a peripheral trench area for device isolation on the silicon substrate, wherein the cell trench area of the cell region is shallower than the peripheral trench area of the peripheral region.Type: GrantFiled: December 30, 2003Date of Patent: June 6, 2006Assignee: DongbuAnam Semiconductor Inc.Inventors: Sung Mun Jung, Chang Hun Han
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Patent number: 7029826Abstract: Silica dielectric films, whether nanoporous foamed silica dielectrics or nonporous silica dielectrics are readily damaged by fabrication methods and reagents that reduce or remove hydrophobic properties from the dielectric surface. The invention provides for methods of imparting hydrophobic properties to such damaged silica dielectric films present on a substrate. The invention also provides plasma-based methods for imparting hydrophobicity to both new and damaged silica dielectric films. Semiconductor devices prepared by the inventive processes are also provided.Type: GrantFiled: June 19, 2001Date of Patent: April 18, 2006Assignee: Honeywell International Inc.Inventors: Nigel P. Hacker, Michael Thomas, James S. Drage
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Patent number: 6828081Abstract: Methods and systems are provided for forming an electrical interconnect layer between two layers of an integrated circuit. The interconnect layer is formed using a material having a first electrical conductivity corresponding to a first state and a second electrical conductivity corresponding to a second state, where the first electrical conductivity is different from the second electrical conductivity. An area of the material of the interconnect layer may be selected, for example, using a mask. Then energy may be applied to the selected area to change the electrical conductivity of the material in the selected area of the interconnect layer. Thus, the present invention may be used to implement optical memory devices which may be read by an electrical circuit.Type: GrantFiled: December 10, 2002Date of Patent: December 7, 2004Assignee: Macronix International Co., Ltd.Inventors: Yi-Chou Chen, Chih-Yuan Lu, Hsiang-Lan Lung, Li-Hsin Chuang
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Patent number: 6818384Abstract: A resist pattern can be formed on a microelectronic substrate, the resist pattern comprising a resist material. A coating layer, including a water-soluble resin, is formed on the resist pattern, wherein the water-soluble resin and the resist material are miscible with one another and intermix to provide an intermixed layer comprising the resist material and the water-soluble resin between the resist pattern and a non-intermixed coating layer. The intermixed layer can be hardened and the non-intermixed coating layer can be removed from the hardened intermixed layer.Type: GrantFiled: October 8, 2002Date of Patent: November 16, 2004Assignee: Samsung Electronics Co., Ltd.Inventors: Sangjun Choi, Sihyeung Lee, Hyoungdo Kim, Woosung Han
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Patent number: 6811953Abstract: The memory unit stores the correlation of the positional change in the image planes of the projection optical modules in the focusing direction and the light quantity change. The image plane position determination unit finds the positional change value of the image planes of the projection optical modules based on the correlation information that is stored in the memory unit and the information on changes in the amount of light that is emitted to the projection optical modules. The compensation value calculating unit calculates the compensation value corresponding to the change in the amount of curvature in the image planes of the projection optical modules. The compensating unit compensates the change value in conformity with the compensation value. The focus compensation optical system is driven based on the change value that is compensated.Type: GrantFiled: May 22, 2001Date of Patent: November 2, 2004Assignee: Nikon CorporationInventors: Hitoshi Hatada, Masaki Kato, Motoo Koyama, Hiroshi Shirasu, Masahiro Iguchi
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Patent number: 6746823Abstract: A process of fabricating a non-gap 3-D microstructure array mold core comprises a first step in which a buffer layer is coated on a substrate. A photomask layer is then coated of the buffer layer. A pattern is subsequently formed on the photomask by photo-lithography. The patterned photomask layer is subjected to a reflow by which a microstructure array is formed on the photomask layer. The microstructure array is coated with a metal conductive layer. The microgaps of the microstructure array are eliminated by an electrocasting layer which is coated on the microstructure array. The non-gap microstructure array mold core so fabricated is made into a metal molding tool by microinjection molding or microthermo-pressure molding.Type: GrantFiled: June 1, 2002Date of Patent: June 8, 2004Assignee: Industrial Technology Research InstituteInventors: Kun-Lung Lin, Min-Chieh Chou, Cheng-Tang Pan
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Patent number: 6664030Abstract: An exemplary method of constructing an alternating phase-shifting mask is described. This method can include providing a vapor in a vapor chamber containing a mask blank, and applying a laser to selected areas of the mask blank to deposit material on the integrated circuit substrate. The material is configured to cause a 180° phase shift at the wavelengths the mask is designed for such as 248 nm, 193 nm or 157 nm.Type: GrantFiled: February 9, 2001Date of Patent: December 16, 2003Assignee: Advanced Micro Devices, Inc.Inventors: Kouros Ghandehari, Bruno LaFontaine, Bhanwar Singh
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Patent number: 6649325Abstract: Methods and formulations for use in preparing thermally conductive dielectric mounts for heat generating semi-conductor devices and associated circuitry. The formulations include a thermoplastic resin selected from the group consisting of polysulfone, poly-ethersulfone, poly-phenylsulfone, and poly-etherimides, with these resins being applied as a dispersion onto the surfaces of opposed metallic members. The dispersion is dried and thereafter treated under heat and pressure at temperatures greater than the glass transition temperature under unit pressures of between 100 psi and 800 psi and for periods in excess of about 30 minutes. The polymer resin may be filled with solid particulate such as alumina and/or boron nitride.Type: GrantFiled: May 25, 2001Date of Patent: November 18, 2003Assignee: The Bergquist CompanyInventors: Benjamin P. Gundale, Sanjay Misra
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Patent number: 6579421Abstract: Ionized sputter deposition apparatus and method employing a low frequency or DC transverse magnetic field to increase the transverse component of the trajectory of sputtered material ions being deposited on the workpiece. Adjusting the strength of the magnetic field will adjust the trajectory angles of the sputtered material being deposited on the workpiece, thereby controlling the ratio between the deposition rates on the upper and lower side walls of openings in the workpiece. Accordingly, the invention permits optimizing the top-to-bottom uniformity of layers deposited on the side walls by adjusting the strength of the magnetic field. The invention is especially useful for depositing thin wetting layers or side wall barrier layers having uniform thickness.Type: GrantFiled: January 7, 1999Date of Patent: June 17, 2003Assignee: Applied Materials, Inc.Inventor: Jianming Fu
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Patent number: 6537738Abstract: A digital photolithography system is provided that is capable of making smooth diagonal components. The system includes a computer for providing a first digital pattern to a digital pixel panel, such as a deformable mirror device (DMD). The DMD is capable of providing a first plurality of pixel elements for exposure onto a plurality of wafer sites. After exposure, the wafer can be scanned a distance less than the site length. The DMD then receives a second digital pattern for exposing a second plurality of pixel elements onto the plurality of sites of the subject. The exposed second plurality of pixel elements overlaps the exposed first plurality of pixel elements. This overlapping allows incremental changes to be made in the image being exposed, thereby accommodating the creation of diagonal components.Type: GrantFiled: August 8, 2000Date of Patent: March 25, 2003Assignee: Ball Semiconductor, Inc.Inventors: Wenhui Mei, Takashi Kanatake
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Patent number: 6485618Abstract: A target and magnetron for a plasma sputter reactor. The target has an annular vault facing the wafer to be sputter coated. Various types of magnetic means positioned around the vault create a magnetic field supporting a plasma extending over a large volume of the vault. An integrated copper via filling process includes a first step of highly ionized sputter deposition of copper, a second step of more neutral, lower-energy sputter deposition of copper to complete the seed layer, and electroplating copper into the hole to complete the metallization.Type: GrantFiled: July 30, 2001Date of Patent: November 26, 2002Assignee: Applied Materials, Inc.Inventors: Praburam Gopalraja, Jianming Fu, Fusen Chen, Girish Dixit, Zheng Xu, Sankaram Athreya, Wei D. Wang, Ashok K. Sinha
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Patent number: 6475703Abstract: A multilayer circuit board having air bridge crossover structures and an additive method for producing the same, wherein the circuit includes specially designed metallic fortifying layers to mechanically and/or electrically fortify the circuit.Type: GrantFiled: December 1, 1998Date of Patent: November 5, 2002Assignee: Visteon Global Technologies, Inc.Inventors: Delin Li, Achyuta Achari, Alice Dawn Zitzmann, Robert Edward Belke, Jr., Brenda Joyce Nation, Edward McLeskey, Mohan R. Paruchuri, Lakhi Nandlal Goenka
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Patent number: 6444346Abstract: In a polymer electrolyte membrane type fuel cell employing a high polymer ion exchange membrane as an electrolyte, a fuel cells stack is produced at a low cost by easily constituting flow passages for a fuel gas, an oxidizing agent gas and a cooling water which have been conventionally constituted by a cutting process being hard to process and hard to reduce a cost. The fuel gas passage, the oxidizing agent gas flow passage and the cooling water flow passage are constructed by a combination of a diffuser constituted by a conductive porous body or a corrugated plate and an elastic gasket, whereby a cutting process is not required, and a number of parts can be reduced and an operating performance can be improved by integrally forming the gasket with the separator, so that a cost can be reduced.Type: GrantFiled: July 15, 1999Date of Patent: September 3, 2002Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Hideo Ohara, Makoto Uchida, Yasushi Sugawara
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Patent number: 6409890Abstract: Embodiments include devices and methods for sputtering material onto a workpiece in a chamber which includes a plasma generation area and a target. A coil is positioned to inductively couple energy into the plasma generation area to generate a plasma. A body is positioned between the workpiece and the target to prevent an amount of target material from being sputtered onto the workpiece. The body prevents an amount of target material from being sputtered onto the workpiece. The body may act as a dark space shield and inhibit plasma formation between the body and the target. The body may also act as a physical shield to block sputtered material from accumulating on the workpiece.Type: GrantFiled: July 27, 1999Date of Patent: June 25, 2002Assignee: Applied Materials, Inc.Inventors: Howard E. Grunes, Zheng Xu, Praburam Gopalraja, John C. Forster, Ralf Hofmann, Anantha Subramani
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Patent number: 6403286Abstract: A relatively facile, inexpensive method for patterning a layer of glass or a substrate involves patterning a seed material containing a nucleating agent adjacent a layer of thermally crystallizable glass and heart treating the seed material and the layer of thermally crystallizable glass to induce highly oriented crystal growth from the seed material through the thickness of the thermally crystallizable glass layer at selected portions thereof. After the heart treatment, the layer of thermally crystallizable glass is converted into a desired pattern of glass surrounded by crystalline material. The crystalline material is removed with an etchant to leave a desired glass pattern.Type: GrantFiled: November 4, 1999Date of Patent: June 11, 2002Assignee: Corning IncorporatedInventors: Robert A. Bellman, Ljerka Ukrainczyk