Abstract: A circuit includes a bridgeless flyback converter having a primary side electromagnetically coupled to a secondary side by a transformer, the primary side being devoid of a diode bridge rectifier, an input capacitor coupled to the primary side of the bridgeless flyback converter, an output capacitor coupled to the secondary side of the bridgeless flyback converter, an EMI (electromagnetic interference) filter coupled between an AC input and the input capacitor, and a compensation stage coupled in parallel with the output capacitor and including a storage capacitor. The input capacitor has a capacitance such that the compensation stage filters the AC mains frequency ripple of the AC input from the secondary side. The compensation stage is configured to store energy in the storage capacitor and regulate the voltage across the output capacitor. The bridgeless flyback converter is configured to regulate the voltage across the storage capacitor.

Abstract: Systems disclosed herein provide for a low-noise current mirror operable under low power supply requirements. Embodiments of the systems provide for a low input current path and a high input current path, wherein the current in the low current input path sees a higher voltage and the current in the high input current path sees a lower voltage. Embodiments of the system also provide for a cascode transistor in the high input current path.

Abstract: A power conversion circuit is provided. A power level of the power conversion circuit is determined by taking a first sample of a voltage potential of a resonant capacitor at a first time. A second sample of the voltage potential of the resonant capacitor voltage is taken at a second time. An electric current is determined based on the first sample and second sample.

Abstract: Embodiments of the disclosure pertain to a voltage regulator system having a voltage regulation controller and a transformer assembly. The transformer assembly includes a coil winding, a multi-contact tap arrangement connected to the coil winding, and a multifurcated tap changer system that includes a first tap changer having a contactor element which makes contact with a first contact of the multi-contact tap arrangement when the controller provides a positioning stimulus based on sensing a voltage deviation from a nominal output voltage of the voltage regulator system. The multifurcated tap changer system further includes a second tap changer that is mechanically ganged to the first tap changer and includes another contactor element arranged to automatically make contact with a second contact of the multi-contact tap arrangement when the contactor element of the first tap changer makes contact with the first contact of the multi-contact tap arrangement.

Abstract: A current resonant type DC voltage converter includes: a switching circuit configured to generate an AC voltage from a DC input voltage; a LC resonance circuit configured to resonate in response to application of the AC voltage to a resonant capacitor and a resonant coil; a transformer having a primary side connected in series to the LC resonance circuit; a parallel resonant inductance present in parallel to the transformer; a rectifier circuit configured to rectify a current appearing on a secondary side of the transformer to generate a DC output voltage; and a parallel resonant inductance adjustment circuit configured to change the parallel resonant inductance.

Abstract: There is provided a DC power source apparatus that can prevent failures in components included in the DC power source apparatus and a load and that can prevent damage to or deterioration in the components. A control unit of the DC power source apparatus includes a function of limiting a duty value that is the ratio of an on-time to the switching period of a switching device, and makes an upper limit value for limiting the upper limit of the duty value variable during switching operation of the switching device.

Abstract: Methods and apparatus for determining a value of a pulse-width modulation (PWM) signal with which to drive a power stage of a DC-to-DC voltage converter having an output inductor coupled between the power stage and an output node that is couplable to a load. A plurality of control schemes for determining a value of a PWM signal with which to drive the power stage are maintained. A value of the PWM signal currently driving the power stage is monitored. A value of an inductor current flowing through the output inductor is monitored. A value of a load current being provided to the load is monitored. One of the plurality of control schemes is selected based on the value of the PWM signal currently driving the power stage, the value of the inductor current, and the value of the load current. The selected control scheme is used to determine a value of a PWM signal with which to drive the power stage.

Abstract: An alternating current (AC) inverter includes a converter circuit configured to convert a direct current (DC) voltage to an AC voltage, and output terminals, the converter circuit being configured to output the AC voltage to the output terminals. The AC inverter further includes a signal terminal configured to receive a signal from outside of the AC inverter, and a control circuit configured to detect an abnormality related to the AC inverter, control the converter circuit to stop conversion of the DC voltage to the AC voltage in response to detection of the abnormality, and control the converter circuit to resume conversion of DC voltage to the AC voltage in response to reception of the signal on the signal terminal.

Abstract: Methods and apparatus for DC-DC soft start are disclosed herein, an example DC-DC voltage converter includes at least two transistors to at least charge or discharge an inductor from an input source and to ground respectively, the inductor to output an output voltage. A synchronize and track circuit generates a bias current based on a reference voltage. An amplifier generates an error current based on an output voltage and the reference voltage. An oscillator oscillates at a switching frequency based on the bias current and the error current. A multiplexer selects between (1) a first input signal generated based on the switching frequency, and (2) a second input signal generated based on the switching frequency and the error current, for output as a reset signal. A latch provides a control signal to the at least two transistors based on the reset signal and the switching frequency.

Abstract: A power converter includes a controller. The controller is configured to charge a capacitor of the controller based on a peak voltage applied to a primary-side winding of a transformer of the power converter. The controller is also configured to apply a discharge current defined by a first amount of current to the capacitor, and responsive to discharging the capacitor to a reference voltage level, determine, based on a feedback voltage generated by a primary-side auxiliary winding of the transformer, whether a discharge time of the capacitor is equal to a discharge time of the secondary-side winding. The controller is further configured to responsive to determining that the discharge time of the capacitor is not equal to the discharge time of the secondary-side winding, adjust the discharge current from the first amount of current to a second amount of current. The second amount of current is indicative of a predicted discharge time of a secondary-side winding of the transformer.

Abstract: A system and a method for optimizing fundamental frequency modulation in a cascaded multilevel inverter (CMI) are provided. The CMI includes at least a first H-bridge module and a second H-bridge module connected in series with the first H-bridge module. The first H-bridge module is operated according to a first duty cycle and the second H-bridge module is operated according to a second duty cycle. The first duty cycle is greater than the second duty cycle. The first and second H-bridge modules are controlled utilizing fundamental frequency modulation. A portion of the first duty cycle is transferred to the second duty cycle thereby optimizing fundamental frequency modulation by at least improving power sharing between the first and second H-bridge modules and improving equalization of DC capacitor currents and voltage ripples while maintaining the same fundamental modulation to the output voltage waveform.

Abstract: The invention relates to decentralized energy production. In particular, the invention concerns a system for coupling a monophase power source to an internal multiphase power network of a household, company, or other property. The internal network is further connected to an external power distribution grid. The system comprises an interface unit comprising a first connection point for said monophase power source and a second connection point for said multiphase power network, the interface unit allowing for monophase power from the monophase power source to be fed to the multiphase network, and means functionally connected to the interface unit for monitoring the loading states of individual phases of the multiphase power network. The interface has coupling means to couple monophase power to selectively one of the phases of the multiphase power network based on the loading states of the individual phases of the multiphase power network.

Abstract: The invention mainly provides a power converter (3) including a positive converter bridge (P+) and a negative converter bridge (P?), the converter bridges being of the diode bridge type and being connected in parallel, each converter bridge including a first series of arms of components connected to the phases of the first secondary of the transformer (2) and a second series of arms of components connected to the phases of the second secondary of the transformer (2), said power converter being characterized in that at least one series of arms of components includes arms (B1, B2, B3) disposed relative to one another in such a manner as not to be aligned in the same plane.

Abstract: The invention relates to a circuit arrangement of a phase leg of a three-point converter. A circuit arrangement of a three-point converter is provided that is optimised with regard to the suppression of parasitic inductance, and at the same time has a compact simple construction, so that the converter can be incorporated in a electrical enclosure in a space-saving and installation friendly manner.

Abstract: The present disclosure discloses a power converter and a switching power supply device. The power converter includes an energy storing and outputting circuit used for charging a load after storing energy, a main switch used for transmitting input power to the energy storing and outputting circuit when the main switch is conducting, an after flow switch used for supplying an after flow loop to the energy storing and outputting circuit when the main switch is shut down, a driving circuit used for changing connecting states of the main switch and the after flow switch according to a preset clock frequency, and a testing circuit and a feedback circuit, the testing circuit is used for testing a voltage on a connecting node of the main switch and the after flow switch.

Abstract: A device is configured to provide low dropout regulation. An amplifier stage includes a first transistor electrically connected to an output of the device, and a second transistor. A current mirror includes a third transistor electrically connected to the second transistor, and a fourth transistor electrically connected to the third transistor. The auxiliary current source has a control terminal electrically connected to a gate electrode of the fourth transistor. The pull down stage includes a fifth transistor having a gate electrode electrically connected to a drain electrode of the first transistor, and a sixth transistor having a gate electrode electrically connected to the gate electrode of the fourth transistor. The pull up transistor has a gate electrode electrically connected to a drain electrode of the fifth transistor. The first capacitor has a first terminal electrically connected to the gate electrode of the first transistor.

Abstract: Disclosed a voltage-deviation detecting and adjusting system for a balance module of a battery.

Abstract: A processor system includes first and second regulators for regulating an adjusted supply voltage. In one embodiment, the regulator system comprises a digital low-dropout (DLDO) control system comprising first and second regulators that generate a plurality of control signals to regulate an adjusted power supply voltage and that generate a charge when a droop level falls below a droop threshold value. The first regulator implements a first control loop and the second regulator implements a second and much faster acting control loop. A supply adjustment block with the two regulators and control loops are provided for each processor core allowing different cores to have different regulated supply levels all based on one common supply.

Abstract: An integrated circuit having power supply circuitry configured to generate a temperature dependent power supply voltage is provided. The power supply circuitry may include temperature sensors formed at different regions on the integrated circuit. The power supply circuitry may use a selected one of the temperature sensors to vary the temperature dependent power supply voltage. The power supply circuitry may include voltage clamping circuitry configured to clip the power supply voltage to an upper fixed voltage level when the power supply voltage exceeds a first predetermined threshold and to clip the power supply voltage to a lower fixed voltage level when the power supply voltage falls below a second predetermined threshold. The power supply circuitry may also include voltage overshoot-undershoot protection circuitry configured to keep the temperature dependent power supply voltage within a specified voltage range in the presence of transient perturbations in the temperature dependent power supply voltage.

Abstract: Provided is a method of controlling a three phase equivalent voltage in a multilevel inverter including sensing a state of each of power cells of the multilevel inverter to determine whether or not failure occurs at each of the power cells, bypassing power cells which are determined as being failed to connect power cells operating normally to each other in series per each phase, calculating an offset voltage value using a phase voltage reference per each phase and a sum of each of direct current (DC) link voltages of the power cells which operate normally and configure each of the phases, and calculating a pole voltage reference per each phase for maintaining an equivalence of a three phase line-to-line output voltage using the phase voltage reference per each phase and the calculated offset voltage.