Patents Examined by Diane Evensen Smith
  • Patent number: 5222229
    Abstract: A synchronization controller is provided for each processor in a multiprocessor system. The synchronization controllers are commonly connected to a synchronization signal bus. Each of the synchronization controllers has a synchronization wait signal transmitting means for receiving a synchronization request signal from a corresponding processor, signal means for transmitting a synchronization wait signal to the synchronization signal bus, a synchronization register for specifying the other processors to be synchronized with the corresponding processor, a comparator means for comparing the signal from the synchronization signal bus with the content of the synchronization resister, and a means for transmitting to the corresponding processor a synchronization-acknowledge signal based on the result of comparison by the comparator means.
    Type: Grant
    Filed: March 9, 1990
    Date of Patent: June 22, 1993
    Assignee: International Business Machines
    Inventors: Munehiro Fukuda, Takashi Matsumoto, Takeo Nakada