Abstract: An abnormality recovery system in a network comprising a plurality of station units connected by a ring-like data transmission line enabling circular transmission of communication data in digital form in a single direction. In the system, when it is determined that an abnormality occurs in a communication IC, a CPU performs switch control to switch a communication data route so as to bypass the communication IC and send communication data on a bypass from an optical receiver to an optical transmitter.

Abstract: The host adaptor packages 4 and the disk adaptor packages 6 which constitute the magnetic disk subsystem 1 are connected to the common bus 3 consisting of a data bus, a control bus, and a power line in the hot replacement ready state. The packages 4 and 6 have the control means 11 and the clock generator 14 and when a failure occurs in respective packages, the package replace controller 13 mounted in the control means 11 executes the blocking processing for the bus driver 15 and the clock generator 14. If this occurs, the clock generator 14 enters the stopped state, so that the circuit in the package enters the reset state and the package function is stopped, that is, the package enters the blocked state. As a result, hot replacement of the closed package can be executed without affecting the operation of the system.

Abstract: Method and apparatus for fault management of computer networks which utilizes a proxy or recruit network device to test the responsiveness of a network device. When a first network device loses contact with a second network device, the first network device uses a proxy network device to determine if the second network device can be reached and reports back to the first network device whether the contact attempt was successful. The proxy network device may contact the second network device through a different path and/or protocol than used by the first network device.

Abstract: A method and system for diagnosing data-processing system performance. Initially, unique audible sounds are associated with particular performance indicators within the data-processing system. Thereafter, performance indicators are identified, one or more of which indicate data-processing system performance. A diagnostic is then periodically run to detect performance indicators within the data-processing system. A unique audible sound is then generated associated with a particular performance indicator, in response to detecting the status of particular performance indicator via the diagnostic, such that potential data-processing system failures may be recognized by identifying the unique audible sound. The unique audible sound may be continuously generated at varying durations and volumes to indicate the presence of system failures. A trained user, accustomed to particular audible sounds, can identify and diagnose system failures by analyzing unique audible sounds generated by the data-processing system.

Abstract: A computer which has multiple central processing units where at least one of the processors is a spare and unused for normal system operation, provides a mechanism for transferring the micro-architected state of a checkstopped processor to a spare processor. Each processor has a set of registers in the central processing unit where the micro-architected state of the processor is kept and these registers are accessible by millicode or microcode running on that processor. A checkstop of a processor is detected by the system, the micro-architected state of that processor is extracted and returned to the system where that state can be loaded into a spare processor in the system and processing resumed without interruption.

Abstract: A method of evaluating a program in which a second program is inserted into an instruction processing of a first program, includes the steps of: latching an address value of a stack pointer when executing an instruction for calling the second program; comparing the address value of the stack pointer held with an address value of a stack pointer during a subsequent instruction execution; and when they are coincident with each other, judging the termination of execution of the second program.

Abstract: A computer system includes a dual basic input-output system (BIOS) read-only memory (ROM) system to initialize the computer. When the computer is first powered on or reset, the primary BIOS ROM is initially enabled. The computer analyzes the contents of the primary BIOS memory to detect data errors. If a data error is detected, a chip enable circuit disables the primary BIOS ROM and enables a secondary BIOS ROM containing essentially the same initialization instructions as the primary BIOS ROM. If no errors are detected in the secondary BIOS ROM, the initialization of the computer proceeds using the secondary BIOS ROM. As part of the initialization procedure, the contents of the secondary BIOS ROM are copied to a random access memory. The primary BIOS ROM can then be reprogrammed with the contents of the secondary BIOS ROM using the copy in random access memory, or from the secondary BIOS ROM itself.

Abstract: An approach for recovering after premature termination of a plurality of transactions involves: A) selecting a previously unselected transaction from the plurality of transactions; B) processing the selected transaction by undoing the lesser of a predetermined number of changes made by the selected transaction and all changes made by the selected transaction; and C) repeating steps A) and B) until all of the plurality of transactions have been processed. Another aspect of the approach involves: A) selecting a previously unselected transaction from the plurality of transactions, wherein the selected transaction is the previously unselected transaction from the plurality of transactions that made the fewest number of changes in the database; B) processing the selected transaction by undoing one or more changes in the database made by the selected transaction; and C) repeating steps A) and B) until all transactions from the plurality of transactions have been processed.

Abstract: A method for collecting information about the operating condition of a computer system. The method comprises the steps of running a first trace program that collects information about the operating condition of the computer and, in response to the detection of an error in the operating condition of the data storage system by the first program, determining whether a first flag is on or off. The first flag indicates whether or not a second trace program should be run. If the first flag is on, the second program is run. The second trace program is designed to collect different information about the operating condition of the computer system than the first trace program collects.

Abstract: Memory modules such as SIMMs and DIMMs are automatically tested by a target-system motherboard such as a PC motherboard. An automated SIMM/DIMM handler is connected to a handler adaptor board that is mounted to the back or solder-side of the PC motherboard. The relatively flat surface of the solder-side of the PC motherboard allows close mounting of the handler. One or more of the SIMM sockets on the motherboard is removed to provide mounting holes for the handler adaptor board. The handler adaptor board provides electrical connection from the module-under-test (MUT) in the handler to the removed SIMM socket on the PC motherboard. The handler adaptor board provides a slight spacing or offset from the solder-side surface of the PC motherboard's substrate, allowing the handler to be plugged directly into tester-connectors on the handler adaptor board.

Abstract: A stand alone Redundancy Management System (RMS) provides a cost-effective solution for managing redundant computer-based systems in order to achieve ultra-high system reliability, safety, fault tolerance, and mission success rate. The RMS includes a Cross Channel Data Link (CCDL) module and a Fault Tolerant Executive (FE) module. The CCDL module provides data communication for all channels, while the FTE module performs system functions such as synchronization, data voting, fault and error detection, isolation and recovery. System fault tolerance is achieved by detecting and masking erroneous data through data voting, and system integrity is ensured by a dynamically reconfigurable architecture that is capable of excluding faulty nodes from the system and re-admitting healthy nodes back into the system.

Abstract: A system for performing regulated transactions is used with a network that is commonly accessible by a plurality of communication terminals. A gatekeeper, coupled to the network, permits access to the system only if authorization information, as indicated by an authorization signal received by the gatekeeper from a communication terminal via the network, complies with at least one predetermined criterion. The authorization information includes information independent of information supplied by a communication terminal user and independent of information indicative of a communication line coupled to the user's communication terminal. A host, coupled to the gatekeeper, receives a first signal from the user's communication terminal through the network and sends a second signal through the network to the user's communication terminal in response to the first signal.

Abstract: An error propagation system and method uses a central control point at each node of a multinodal computer system to control error message distribution. The central point at each node ANDs all of the error messages from each of the functional units at that node and then distributes an error signal to all of the local functional units and to a next node via the SCI linkage. A single bit on the SCI protocol alerts the next node that an error has occurred on another node. The central point at that node then distributes the error signal to all of the local functional units at that node. The error signal is then passed along to a next node for a repeat of the process. Clock stoppage, which would normally occur when an error is detected, is inhibited long enough to allow the error signal to be passed along to a next node. The clock stoppage inhibiting circuit is itself inhibited if the error information could be lost thereby allowing immediate clock stoppage without regard to propagating the error to the next node.

Abstract: The system is comprised of processing unit for executing an error monitoring process by detecting errors occurring in the video/audio devices, communication unit connecting the video/audio devices to the processing unit, and display unit connected to the processing unit to simultaneously display on a common display plane a plurality of images indicating the video/audio devices and to give an error indication in accordance with a result of the error monitoring process by the processing unit, the processing unit automatically executing the error monitoring process against respective the video/audio devices, and controlling the display unit to give the error indication by emphasizing one of the images corresponding to one of the video/audio devices from which an error is detected by the processing unit.

Abstract: A method of managing data in a flash EEPROM memory array allows all data to be recovered after power loss except new data in a sector in which the data content is being changed when power is lost. The method includes providing a block data structure and a plurality of sector data structures in each block of a flash EEPROM memory array, each data structure storing an indication of the operating state of the block or an associated physical sector of the array; changing the indication stored in the block data structure or the sector data structure when the operating state of the block or the associated sector changes; detecting the indication stored in the block data structure and the sector data structures when power is restored to a system which has lost power; and managing the flash EEPROM memory array depending on the indications detected.

Abstract: An automatic system is provided for dynamic diagnosis and repair of a user's computer through the utilization of a programmable interface to access and use relevant data in which a special script comprising a relatively small program first makes an inventory of hardware, software and configuration information relative to the user, his equipment and the network and stores this information in a single uniform object oriented database. A large number of system tools are also stored so that upon accessing the inventory and looking at any relevant data the script can call the available tools to automatically correct any user problem, whether it be compatibility of peripherals, software conflicts, providing missing software components, or correcting other problems, all on an automatic basis without user intervention or oftentimes without user knowledge.

Abstract: A system and method examine execution or interpretation of a Downloadable for operations deemed suspicious or hostile, and respond accordingly. The system includes security rules defining suspicious actions and security policies defining the appropriate responsive actions to rule violations. The system includes an interface for receiving incoming Downloadable and requests made by the Downloadable. The system still further includes a comparator coupled to the interface for examining the Downloadable, requests made by the Downloadable and runtime events to determine whether a security policy has been violated, and a response engine coupled to the comparator for performing a violation-based responsive action.

Abstract: A system control unit of a digital audio data accumulation device detects faulty storage portion per a predetermined unit in an audio storage device and a faulty address table is sequentially generated from the leading address of the audio storage device on the basis of a result of detection. The system control unit stores an input digital compression signal from an audio compression/decompression device in said audio storage device while avoiding faulty storage portion by making reference to the faulty address table. The system control unit reads out an output audio digital compressed signal from the audio storage device while avoiding faulty storage portion by making reference to the faulty address table.

Abstract: A software analysis system for capturing tags generated by tag statements in instrumented source code. The software analysis system includes a probe that monitors the address and data bus of the target system. When a tag statement is executed in the target system, a tag is written to a predetermined location in the address space of the target system. The tag contains a tag value that is indicative of the location in the source code of the tag statement generating the tag. By monitoring the predetermined address, the probe is able to capture tags as they are written on the data bus of the target system. By properly instrumenting the source code, the software analysis system is able to perform a variety of analysis functions in essentially real time, including code coverage, function and task execution times, memory allocation, call pairs, and program tracing.

Abstract: A communication monitoring and controlling apparatus for easily collecting monitoring information is connected to an existing network composed of a plurality of communication equipment. A management information collecting unit collects management information of each of the communication equipment. The management information is in an existing network management information format. A format converting unit converts the management information in the existing network management information format into management information in a new-type network management information format. The new-type network management information format is a format used by the new-type network, and handles the existing network composed of the communication equipments as one network element. The converted management information is transmitted to at least one operation system of the new-type network by a transmitting unit.