Patents Examined by Dominic Hawkins
  • Patent number: 9746572
    Abstract: Integrated buried utility locator systems, including a locator including a marker device excitation transmitter a buried utility locator along with one or more marker devices, are disclosed. In operation a marker device excitation signal is sent from the locator at least partially simultaneously to receiving and processing a buried utility signal.
    Type: Grant
    Filed: October 16, 2014
    Date of Patent: August 29, 2017
    Assignee: Seescan, Inc.
    Inventors: Mark S. Olsson, Stephanie M. Bench, Ray Merewether, Jan Soukup
  • Patent number: 9739844
    Abstract: Guidance and alignment systems are disclosed for wireless charging systems to assist in aligning the transmitter and receiver inductive power transfer (IPT) couplers. These systems guide positioning and alignment to provide sufficient coupling between the transmitter and receiver IPT couplers. Exemplary systems provide a magnetic field sensor, magnetic field generator, and magnetic vectoring to determine a position of an electric vehicle or a wireless charging base. In a magnetic vectoring system, an alignment system comprising at least three coils (or similar circuits) on a magnetically permeable substrate receives a positioning magnetic field including modulated information signals and processes the received signal to generate an output for determining a position of the positioning magnetic field source relative to the magnetic field sensor position.
    Type: Grant
    Filed: October 15, 2014
    Date of Patent: August 22, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Hans Peter Widmer, Lukas Sieber, Andreas Daetwyler
  • Patent number: 9739816
    Abstract: The present disclosure describes a differential shield capacitive sensor design. The sensor design uses a differential measurement to measure capacitance and a pair of traces are used to differentially reject the response of the sensor traces and balance any parasitic capacitances. In some embodiments, the sensor design includes a differential sensor design on a bottom side of a flex circuit to differentially balance the environment and reject noise coupling to the sensor. The top side of the flex circuit can include a single ended design for proper environment sensing. The spatial arrangement and size of the sensors may vary depending on the application.
    Type: Grant
    Filed: October 29, 2014
    Date of Patent: August 22, 2017
    Assignee: ANALOG DEVICES, INC.
    Inventor: Adrian Anthony Flanagan
  • Patent number: 9726693
    Abstract: Provided is a probe member for a pogo pin, which is used for testing a semiconductor device, and at least a portion of which is inserted into a cylindrical body to be supported by an elastic member and an upper end of which contacts a terminal of the semiconductor device.
    Type: Grant
    Filed: April 18, 2014
    Date of Patent: August 8, 2017
    Assignee: ISC CO., LTD.
    Inventor: Jae-Hak Lee
  • Patent number: 9714988
    Abstract: A Hall Effect sensor with a graphene detection layer implemented in a variety of geometries, including the possibility of a so-called “full 3-d” Hall sensor, with the option for integration in a BiCMOS process and a method for producing said Hall Effect sensor is disclosed.
    Type: Grant
    Filed: October 15, 2014
    Date of Patent: July 25, 2017
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Markus Eckinger, Stefan Kolb, Alfons Dehe, Guenther Ruhl
  • Patent number: 9689889
    Abstract: Various embodiments of the invention allow to reduce unwanted high-Q oscillations in capacitive MEMS sensors. In certain embodiments, stabilization of high-Q MEMS sensors is accomplished through a dedicated ultra-low power circuit that provides a bias voltage to one or more sensor electrodes during an OFF-phase. The bias voltage forces a balance condition that eliminates perturbations and enables smooth transitions that, ultimately, result in shorter sensor settling times.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: June 27, 2017
    Inventors: Roberto Casiraghi, Igino Padovani, Giorgio Massimiliano Membretti, Filippo David
  • Patent number: 9689910
    Abstract: An apparatus and method for detecting faults in a two-wire electric power line isolated from ground includes substantially identical high impedance voltage dividers connected between each of the two wires of the power line and ground, circuits for carrying the output voltages from each voltage divider, a circuit for comparing the output voltages, and outputting a fault signal indicative of a ground fault.
    Type: Grant
    Filed: June 10, 2013
    Date of Patent: June 27, 2017
    Assignee: Wabtec Holding Corp.
    Inventor: Carl L. Haas
  • Patent number: 9671252
    Abstract: An apparatus of detecting capacitance detects a capacitance change of a capacitive sensor. The apparatus includes a pulse modulator configured to output a charging signal including at least one pulse. A switch is configured to charge the capacitive sensor according to the charging signal and output a discharging signal from the capacitive sensor. A discharging compensator is configured to output a discharging delay signal by compensating a voltage level of the discharging signal during a falling period of the discharging signal. A detector is configured to output a detection signal by detecting a region where the discharging delay signal has a voltage threshold. A controller is configured to detect the capacitance change by measuring a discharging time of the capacitive sensor according to the detection signal.
    Type: Grant
    Filed: October 17, 2014
    Date of Patent: June 6, 2017
    Assignees: Hyundai Motor Company, Hyundai Mobis Co., Ltd.
    Inventors: Haijin Seo, Wonho Shin, Jongil Yu, Heungjoo Choi, Jongchul Lim, Youngjun Jang
  • Patent number: 9664725
    Abstract: A method of preventive detection of a fault in at least one device under surveillance of a group comprising at least two devices, the device under surveillance having at least one first parameter correlated with at least one second parameter of at least one second device in the group, said parameters representing state variables of said devices. The method includes the following steps: predicting a value of the first parameter from a measured value of the second parameter; comparing the predicted value of the first parameter and a measured value of the first parameter; and analyzing the result of the comparison effected in the comparison step to detect a potential fault. The invention also relates to a computer program, an installation, and a module for preventive detection of a fault in a device.
    Type: Grant
    Filed: October 16, 2012
    Date of Patent: May 30, 2017
    Assignee: ALSTOM TECHNOLOGY LTD.
    Inventors: Eric Amoussouga, Yves Thillot
  • Patent number: 9664810
    Abstract: A method of locating a position of a linear object, including arranging a first and a second reactor around a measuring point, the first reactor generating an induced voltage corresponding to an X-direction component of a magnetic field, the X direction perpendicular to a running direction of the object, and the second reactor generating an induced voltage corresponding to a Y-direction component of the field, the Y direction perpendicular to the X-direction and the running direction; obtaining a first reactor induced voltage and a second reactor induced voltage; setting an X-distance as a first distance from the point to the object center, and setting the Y-distance as a second distance; and estimating a direction in which the linear object is located as viewed from the point, by regarding an X-distance to Y-distance ratio as equal to a ratio of the first voltage to the second voltage multiplied by a coefficient.
    Type: Grant
    Filed: April 22, 2014
    Date of Patent: May 30, 2017
    Assignee: TAKACHIHO SANGYO CO., LTD.
    Inventor: Morio Mizuno
  • Patent number: 9651608
    Abstract: A diagnostic circuit for inspecting a light-emitting device having light-emitting elements. The diagnostic circuit includes a power source module, a buffer module, and an abnormality detection module. The buffer module includes a plurality of buffers. Each buffer has a buffer input terminal and a buffer output terminal. The buffer input terminal receives a first power source signal from the power source module, and the buffer output terminal outputs a second power source signal to one of the light-emitting elements. The abnormality detection module includes a plurality of comparators. Each comparator has a pair of detection input terminals and a detection output terminal. The detection input terminals is configured to receive the first and second power source signals. The detection output terminal outputs a comparison signal to generate a diagnostic result.
    Type: Grant
    Filed: October 16, 2014
    Date of Patent: May 16, 2017
    Assignee: NISHO IMAGE TECH, INC.
    Inventor: Harunobu Yoshida
  • Patent number: 9638782
    Abstract: A system and method for evaluating wafer test probe cards under real-world wafer test cell condition integrates wafer test cell components into the probe card inspection and analysis process. Disclosed embodiments may utilize existing and/or modified wafer test cell components such as, a head plate, a test head, a signal delivery system, and a manipulator to emulate wafer test cell dynamics during the probe card inspection and analysis process.
    Type: Grant
    Filed: June 18, 2013
    Date of Patent: May 2, 2017
    Assignee: Rudolph Technologies, Inc.
    Inventors: Eric Endres, John T. Strom, Christian Kuwasaki, Christopher McLaughlin
  • Patent number: 9632275
    Abstract: A secured cable system for protecting an inner cable is disclosed. The secured cable system includes a cable security system having a first security tape including a tape portion upon which a plurality of detection lines are arranged. The security system may also include a detection box in electrical or optical communication with each of the detection lines in the first security tape. In one embodiment, the security tape is spiral wrapped about the inner cable in a first direction along a length of the inner cable, the security tape being overlapped upon itself at a predetermined overlap factor. The secured cable system may also include a second security tape including a tape portion upon which a plurality of detection lines are arranged in a pattern wherein the second security tape is wrapped about the first security tape in a second direction opposite the first direction.
    Type: Grant
    Filed: June 17, 2013
    Date of Patent: April 25, 2017
    Assignee: CommScope Technologies LLC
    Inventors: David John Chirgwin, Paul John Pepe
  • Patent number: 9618366
    Abstract: An absolute scale configuration is provided for use in a position encoder which includes a readhead and a scale. The absolute scale configuration includes a plurality of scale loops distributed along a measuring axis to provide a position dependent signal that varies depending on a relative position between the scale loops and the readhead. At least some of the scale loops are coupled to respective impedance modulating circuits connected to receive energy from current induced in the scale loop and to provide a unique coded modulation of the scale loop impedance during a code signal generating state. The unique coded modulations as sensed by the readhead are indicative of a coarse resolution absolute position, which may be utilized in combination with the position dependent signal to determine an absolute position with a high resolution.
    Type: Grant
    Filed: November 25, 2014
    Date of Patent: April 11, 2017
    Assignee: Mitutoyo Corporation
    Inventor: Michael Nahum
  • Patent number: 9609693
    Abstract: A heating system is described for generating heat and bringing heat to a semiconductor device under test. The heating system comprises a conduction heating unit comprising a heating resistor, a thermal contact area for thermally contacting the semiconductor device under test, and a thermally conductive and electrically insulating connection between the heating resistor and the thermal contact area. The heating resistor is operable to generate a user-defined amount of heat and arranged to provide a part of the heat generated by the heating resistor to the thermal contact area via the thermally conductive and electrically insulating connection. It is also described that the heating system may further comprise a convection heating chamber operable to provide a user-defined heat-controlled convection to the semiconductor device under test. A method of testing a semiconductor device using a heating system is also described.
    Type: Grant
    Filed: April 26, 2012
    Date of Patent: March 28, 2017
    Assignee: NXP USA, Inc.
    Inventors: Maxime Clairet, Carlos Pereira
  • Patent number: 9606563
    Abstract: An integrated circuit is provided with a bandgap voltage reference circuit having a bandgap reference voltage output. A bandgap failure detection circuit is coupled to the bandgap reference voltage output. The bandgap failure detection forms a model value of the reference voltage from a first time, compares a present value of the reference voltage at a second time to the model value; and asserts a bandgap fail signal to indicate when the present value is less than the model value by a threshold value. The integrated circuit is reset by the bandgap fail signal. The detection circuit may be operated from a failsafe voltage domain that also allows a critical circuit to complete a pending operation during a reset.
    Type: Grant
    Filed: April 8, 2014
    Date of Patent: March 28, 2017
    Assignee: TEXAS INSTRUMENTS DEUTSCHLAND GMBH
    Inventors: Frank Dornseifer, Matthias Arnold, Johannes Gerber
  • Patent number: 9588155
    Abstract: Threshold detection for load current on a bus involves generating an output current representative of the load current using a transconductance circuit, sampling the output current during a quiescent phase of the bus to produce a sample current, generating a compensation current that is proportional to the transconductance gain associated with the transconductance circuit, where the compensation current is a function of the sample current, combining the output current, the sample current, the compensation current, and a reference current representative of a threshold value for the load current to produce a combined current, and using a discriminator during an active phase of the bus to output a first value when the sum current exceeds the threshold value and a second value when the combined current is less than the threshold value.
    Type: Grant
    Filed: October 16, 2014
    Date of Patent: March 7, 2017
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Siddhartha Gopal Krishna, Ramji Gupta
  • Patent number: 9588143
    Abstract: Provided is a resistor for detecting current, which includes a voltage terminal member capable of removing an influence of error voltage, formed by tiny amount of self inductance existing in the resistor. The voltage terminal member includes a resistance body (11); a pair of electrodes (12) fixed to each end of the resistance body; and a pair of voltage terminal members (3) for detecting voltage generated in the resistance body and that are connected to each electrode; wherein the voltage terminal member (3) includes a connecting portion (3b) for connecting to the electrode (12), an extending portion (3c1,3c2) extending from the connecting portion toward the other electrode side; and wherein each end of the extending portion reaches to same plane (X) perpendicular to current path between the electrodes.
    Type: Grant
    Filed: August 21, 2013
    Date of Patent: March 7, 2017
    Assignee: KOA CORPORATION
    Inventors: Keishi Nakamura, Koichi Hirasawa
  • Patent number: 9588161
    Abstract: In one example, this disclosure describes a circuit and techniques that may be used to measure the ion balance in an ionization balance device (10). The described circuit comprises a capacitor (22) that includes two conductors (23, 24), wherein a first one (23) of the conductors is exposed to the output of the ionization device, and the second one (24) of the conductors is shielded from the output of the ionization device. The first conductor may accumulate charge so as to quantify the output of the ionization balance device. A switch (29) may be used to discharge the first conductor at periodic intervals in order to measure the accumulated charge on the first conductor, and signal processing may be performed on this discharge measurement in order to generate feedback that can be used to control and adjust the output of an ion source.
    Type: Grant
    Filed: November 29, 2011
    Date of Patent: March 7, 2017
    Assignee: Desco Industries, Inc.
    Inventor: Siarhei V. Savich
  • Patent number: 9581567
    Abstract: A device for discovering, identification and monitoring, of mechanical flaws in metallic structures is disclosed, based on magneto-graphic/magnetic tomography technique to identify stress-related defects. The device can determine the position of the defect or stress including depth information. The device includes registration means that optimized for use with metallic structures of various types, shapes and sizes. Applications include a real-time quality control, monitoring and emergency alarms, as well structural repairs and maintenance work recommendations and planning. Examples of the device implementation include pipes for oil and gas industry monitoring, detection of flaws in rolled products in metallurgical industry, welding quality of heavy duty equipment such as ships, reservoirs. etc. It is especially important for loaded constructions, such as pressured pipes, infrastructure maintenance, nuclear power plant monitoring, bridges, corrosion prevention and environment protection.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: February 28, 2017
    Inventors: Valerian Goroshevskiy, Svetlana Kamaeva, Igor Kolesnikov