Abstract: An animation file processing method and apparatus, a computer-readable storage medium, and a computer device are provided. The method includes: obtaining a bitmap image sequence corresponding to an original animation file; encoding a differential pixel region between a bitmap image in the bitmap image sequence and a corresponding key bitmap image when the bitmap image is a non-key bitmap image, to obtain an encoded picture corresponding to the bitmap image; and generating an animation export file corresponding to the original animation file according to encoded pictures corresponding to bitmap images in the bitmap image sequence.

Abstract: Examples described herein relate to a graphics processing apparatus that includes a memory device and a graphics processing unit (GPU). In some examples, the GPU is configured to execute a shader program that is to identify at least two code blocks that are independent from each other and cause execution of an unexecuted independent code block with available data based on use of a scoreboard to track data availability for independent code blocks. In some examples, execution of the shader program is to cause the GPU to select a first code block identifier for tracking completion of a dependency of the first independent code block. In some examples, execution of the shader program is to cause the GPU to identify an offset to a first instruction position in a sequence of instructions of the first independent code block in an instruction queue.

Abstract: A tracked device may be used in an extended reality system in coordination with a tracking device. The tracked device may be ordinarily difficult to track, for example due to changing appearances or relatively small surface areas of unchanging features, as may be the case with an electronic device with a relatively large display surrounded by a thin physical outer boundary. In these cases, the tracked device may periodically present an image to the tracking device that the tracking device stores as an indication to permit tracking of a known, unchanging feature despite the image not being presented continuously on the display of the tracked device. The image may include a static image, designated tracking data overlaid on an image frame otherwise scheduled for presentation, or extracted image features from the image frame otherwise scheduled for presentation. Additional power saving methods and known marker generation methods are also described.

Abstract: Embodiments are generally directed to a system and method for adapting executable object to a processing unit. An embodiment of a method to adapt an executable object from a first processing unit to a second processing unit, comprises: adapting the executable object optimized for the first processing unit of a first architecture, to the second processing unit of a second architecture, wherein the second architecture is different from the first architecture, wherein the executable object is adapted to perform on the second processing unit based on a plurality of performance metrics collected while the executable object is performed on the first processing unit and the second processing unit.

Abstract: A kernel comprising at least one dynamically configurable parameter is submitted by a processor. The kernel is to be executed at a later time. Data is received after the kernel has been submitted. The at least one dynamically configurable parameter of the kernel is updated based on the data. The kernel having the at least one updated dynamically configurable parameter is executed after the at least one dynamically configurable parameter has been updated.

Abstract: A text-based virtual object animation generation includes acquiring text information, where the text information includes an original text of a virtual object animation to be generated; analyzing an emotional feature of the text information; performing speech synthesis according to the emotional feature, a rhyme boundary, and the text information to obtain audio information, where the audio information includes emotional speech obtained by conversion based on the original text; and generating a corresponding virtual object animation based on the text information and the audio information, where the virtual object animation is synchronized in time with the audio information.

Abstract: Examples described herein relate to a software and hardware optimization that manages scenarios where a write operation to a register is less than an entirety of the register. A compiler detects instructions that make partial writes to the same register, groups such instructions, and provides hints to hardware of the partial write. The execution unit combines the output data for grouped instructions and updates the destination register as single write instead of multiple separate partial writes.

Abstract: A wireless device for facilitating visualization of a state of a patient being monitored by monitoring equipment. The device includes a wireless network interface, a camera, and a touch-sensitive display. A processor is in communication with the wireless network interface, the camera, a memory and the touch-sensitive display over a system bus. The device wirelessly receives data representative of a state of a first physiological parameter of a patient over a time interval. The visualization data includes a plurality of visualization data values, each of the visualization data values being generated by a data visualization module of the data visualization server from multiple values of machine data produced by the monitoring equipment in connection with monitoring the first physiological parameter. A first portion of a monitoring screen displayed by the device includes a graphical representation of the visualization data over the time interval along with or more range indicators.

Abstract: A graphics processing unit having multiple groups of processor cores for rendering graphics data for allocated tiles and outputting the processed data to regions of a memory resource. Scheduling logic allocates sets of tiles to the groups of processor cores to perform a first render, and at a time when at least one of the groups has not completed processing its allocated sets of one or more tiles as part of the first render, allocates at least one set of tiles for a second render to one of the other groups of processor cores for processing. Progress indication logic indicates progress of the first render, indicating regions of the memory resource for which processing for the first render has been completed. Progress check logic checks the progress indication in response to a request for access to a region of the memory resource as part of the second render and enables access that region of the resource in response to an indication that processing for the first render has been completed for that region.

Abstract: Methods and apparatus for image processing of spherical content via hardware acceleration components. In one embodiment, an EAC image is subdivided into facets via existing software addressing and written into the memory buffers (normally used for rectilinear cubemaps) in a graphics processing unit (GPU). The EAC facets may be translated, rotated, and/or mirrored so as to align with the expected three-dimensional (3D) coordinate space. The GPU may use existing hardware accelerator logic, parallelization, and/or addressing logic to greatly improve 3D image processing effects (such as a multi-band blend using Gaussian blurs.

Abstract: The present technology relates to an agent providing system, an agent providing method, and a recording medium that make it possible to provide a more suitable agent. There is provided an agent providing system including a control unit that, when newly providing an agent to a cyberspace in which a plurality of agents is allowed to be registered, provides an agent that is separated by a certain amount or more in terms of appearance or voice from an agent already registered in the cyberspace. The present technology can be applied to, for example, an agent providing system that provides an agent to be registered in a cyberspace.

Abstract: Systems and methods for processing primitive fragments in a rasterization phase of a graphics processing system wherein a rendering space is subdivided into a plurality of tiles. The method includes receiving a plurality of primitive fragments, each primitive fragment corresponding to a pixel sample in a tile; determining whether a depth buffer read is to be performed for hidden surface removal processing of one or more of the primitive fragments; sorting the primitive fragments into a priority queue and a non-priority queue based on the depth buffer read determinations; and performing hidden surface removal processing on the primitive fragments in the priority and non-priority queues wherein priority is given to the primitive fragments in the priority queue.

Abstract: A graphics processing system for performing tile-based rendering of a scene that includes safety-related primitives has a plurality of graphics processing units (GPUs), each configured to i) receive tile data identifying one or more protected tiles comprising at least part of a safety-related primitive, ii) process two respective sets of protected tiles, and iii) based on said processing, generate two respective checksums for each respective set of protected tiles. The two respective sets of protected tiles are mutually exclusive, and each respective set and each protected tile being processed by two different GPUs. The system includes a comparison unit configured to compare one or more pairs of checksums, each pair comprising a respective checksum generated based on a same respective set of protected tiles and generated by different GPUs.

Abstract: The present teaching relates to method, system, medium, and implementations for data transfer in LED display. A signal signaling a timing for a next data transfer is received. In response to the signal, a next data transfer instruction is obtained that instructs reading a bit-based image block of an image from a memory. The bit-based image block is transferred, according to the next data transfer instruction, from the memory via a bus connected thereto, to one of a pair of alternate buffers pointed to by a write buffer pointer. Then, the write buffer pointer is toggled to point to another of the pair of alternate buffers and the process repeats. The bit-based image blocks alternately stored in the buffers are later retrieved and displayed on the LED display.

Abstract: The present disclosure relates to a data process apparatus and a method thereof. The data process apparatus includes an internal memory unit and a shader level-1 cache. The internal memory unit is configured to store a to-be-cached matrix. The to-be-cached matrix includes at least a first element and a second element. The first element and the second element are stored in the internal memory unit in order of elements. The first element is located in a first row of the to-be-cached matrix, and the second element is located in next row of the to-be-cached matrix adjacent to the first row. The shader level-1 cache is connected to the internal memory unit, and configured to acquire the to-be-cached matrix to obtain a to-be-processed matrix stored in order of elements, and store the to-be-processed matrix.

Abstract: Techniques for executing computing work by a plurality of chiplets are provided. The techniques include assigning workgroups of a kernel dispatch packet to the chiplets; by each chiplet, executing the workgroups assigned to that chiplet; for each chiplet, upon completion of all workgroups assigned to that chiplet for the kernel dispatch packet, notifying the other chiplets of such completion; and upon completion of all workgroups of the kernel dispatch packet, notifying a client of such completion and proceeding to a subsequent kernel dispatch packet.

Abstract: A disclosed technique includes prefetching display data into a cache memory, wherein the display data includes data to be displayed on a display during a memory black-out period for a memory; triggering the memory black-out period; and during the black-out period, reading from the cache memory to obtain data to be displayed on the display.

Abstract: An animation rendering method is provided. The method includes: obtaining an animation file in a target format; determining, in response to determining that the animation file is decoded, an animation drawing data interval meeting a stationary condition from animation drawing data obtained through decoding; caching initial animation drawing data in the animation drawing data interval; reading, in response to determining that animation drawing data corresponding to a to-be-played frame meets the stationary condition in a playback process of the animation file, the cached initial animation drawing data corresponding to the to-be-played frame; and performing animation rendering according to the read initial animation drawing data.

Abstract: The present disclosure provides a vector graphics data processing method, system, medium, and vector graphics processing device. The method includes the following operations: building a vector primitive path intersection data structure (PIDS) based on coordinates of path intersections (PIs); when a new PI is generated, comparing information of the new PI to information of existing PIs corresponding to an X coordinate or Y coordinate of the new PI; and storing the information of the new PI at a corresponding position in the PIDS corresponding to the X coordinate or Y coordinate of the new PI based on a result of the comparing. Only effective PI data are saved, thereby reducing memory footprint and memory bandwidth, and improving vector graphics processing performance.

Abstract: A processing system includes a graphics pipeline that executes a first shader of a first type and a second shader of a second type. In some cases, the first shader is a geometry shader and the second shader is a pixel shader. The processing system also includes buffers that hold primitives generated by the first shader and provide the primitives to the second shader. The processing system also includes a primitive hub that monitors fullness of the buffers. Launching of waves from the first shader is throttled based on the fullness of the buffers. A shader processor input (SPI) selectively throttles the waves launched by the geometry shader based on a signal from the primitive hub indicating the fullness, an indication of relative resource usage of geometry waves and pixel waves in the graphics pipeline, or an indication of lifetimes of the geometry waves.