Patents Examined by Duy Deo
  • Patent number: 9624577
    Abstract: Embodiments of the present disclosure relate to a metal-doped amorphous carbon hardmask for etching the underlying layer, layer stack, or structure. In one embodiment, a method of processing a substrate in a processing chamber includes exposing a substrate to a gas mixture comprising a carbon-containing precursor and a metal-containing precursor, reacting the carbon-containing precursor and the metal-containing precursor in the processing chamber to form a metal-doped carbon layer over a surface of the substrate, forming in the metal-doped carbon layer a defined pattern of through openings, and transferring the defined pattern to an underlying layer beneath the metal-doped carbon layer using the metal-doped carbon layer as a mask. An etch hardmask using the inventive metal-doped amorphous carbon film provides reduced compressive stress, high hardness, and therefore higher etch selectivity.
    Type: Grant
    Filed: April 27, 2015
    Date of Patent: April 18, 2017
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Pramit Manna, Abhijit Basu Mallick, Mukund Srinivasan, Rui Cheng
  • Patent number: 9620377
    Abstract: Various embodiments herein relate to methods, apparatus and systems for forming a recessed feature in a dielectric-containing stack on a semiconductor substrate. Separate etching and deposition operations are employed in a cyclic manner. Each etching operation partially etches the feature. Each deposition operation forms a protective coating (e.g., a metal-containing coating) on the sidewalls of the feature to prevent lateral etch of the dielectric material during the etching operations. The protective coating may be deposited using methods that result in formation of the protective coating along substantially the entire length of the sidewalls. The protective coating may be deposited using particular reaction mechanisms that result in substantially complete sidewall coating. Metal-containing coatings have been shown to provide particularly good resistance to lateral etch during the etching operation.
    Type: Grant
    Filed: July 20, 2015
    Date of Patent: April 11, 2017
    Assignee: Lab Research Corporation
    Inventors: Eric A. Hudson, Mark H. Wilcoxson, Kalman Pelhos, Hyung Joo Shin
  • Patent number: 9620383
    Abstract: Techniques disclosed herein include methods and systems for clearing out films or materials that may be covering alignment marks on substrates such as semiconductor wafers. Such films include photoresist layers, polymer films, thin films, and other layers that may be opaque or semi-opaque to optical alignment systems. A solvent composition is printed directly on resist films or other patterning films at specified points or regions on a substrate. The solvent composition printed or deposited on a resist film then begins to dissolve portions of the resist film that are directly underneath the solvent composition. The solvent composition and dissolved film material is then removed or washed from the substrate without causing other portions of the resist film to be dissolved, thereby uncovering alignment patterns or marks.
    Type: Grant
    Filed: July 9, 2015
    Date of Patent: April 11, 2017
    Assignee: Tokyo Electron Limited
    Inventor: Anton J. deVilliers
  • Patent number: 9620410
    Abstract: Methods for processing a microelectronic topography include selectively etching a layer of the topography using an etch solution which includes a fluid in a supercritical or liquid state. In some embodiments, the etch process may include introducing a fresh composition of the etch solution into a process chamber while simultaneously venting the chamber to inhibit the precipitation of etch byproducts. A rinse solution including the fluid in a supercritical or liquid state may be introduced into the chamber subsequent to the etch process. In some cases, the rinse solution may include one or more polar cosolvents, such as acids, polar alcohols, and/or water mixed with the fluid to help inhibit etch byproduct precipitation. In addition or alternatively, at least one of the etch solution and rinse solution may include a chemistry which is configured to modify dissolved etch byproducts within an ambient of the topography to inhibit etch byproduct precipitation.
    Type: Grant
    Filed: January 20, 2009
    Date of Patent: April 11, 2017
    Assignee: Lam Research Corporation
    Inventors: Mark I. Wagner, James P. DeYoung
  • Patent number: 9613823
    Abstract: An etching method includes disposing a target substrate within a chamber. The target substrate has a first silicon oxide film formed on a surface of the target substrate by a chemical vapor deposition method or an atomic layer deposition method, a second silicon oxide film that includes a thermally-oxidized film and a silicon nitride film. The second silicon oxide film and the silicon nitride are formed adjacent to the first silicon oxide film. The etching method further includes supplying an HF gas and an alcohol gas or water vapor into the chamber to selectively etch the first silicon oxide film with respect to the second silicon oxide film and the silicon nitride film.
    Type: Grant
    Filed: July 9, 2015
    Date of Patent: April 4, 2017
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Kimihiko Demichi, Kenshirou Asahi, Hiroyuki Takahashi
  • Patent number: 9613806
    Abstract: A NAND flash memory array is initially patterned by forming a plurality of sidewall spacers according along sides of patterned portions of material. The pattern of sidewall spacers is then used to form a second pattern of hard mask portions including first hard mask portions defined on both sides by sidewall spacers and second hard mask portions defined on only one side by sidewall spacers.
    Type: Grant
    Filed: September 4, 2013
    Date of Patent: April 4, 2017
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Jongsun Sel, Tuan Duc Pham, Mun Pyo Hong
  • Patent number: 9613780
    Abstract: A method of fabricating a sample support membrane used to support an electron microscope sample starts with forming a first layer on a first layer of a substrate (S100). A second surface of the substrate that faces away from the first surface is etched to form an opening that exposes the first layer (S102). A second layer is formed on the first layer (S104). The region of the first layer that overlaps the opening as viewed within a plane is removed to expose the second layer (S106).
    Type: Grant
    Filed: March 13, 2015
    Date of Patent: April 4, 2017
    Assignee: JEOL Ltd.
    Inventor: Yuji Konyuba
  • Patent number: 9604338
    Abstract: A microelectronic device is formed by providing a substrate having a recess at a top surface, and a liner layer formed over the top surface of the substrate, extending into the recess. A protective layer is formed over the liner layer, extending into the recess. A CMP process removes the protective layer and the liner layer from over the top surface of the substrate, leaving the protective layer and the liner layer in the recess. The protective layer is subsequently removed from the recess, leaving the liner layer in the recess. The substrate may include an interconnect region with a bond pad and a PO layer having an opening which forms the recess; the bond pad is exposed in the recess. The liner layer in the recess may be a metal liner suitable for a subsequently-formed wire bond or bump bond.
    Type: Grant
    Filed: August 4, 2015
    Date of Patent: March 28, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Jonathan Philip Davis, Andrew Frank Burnett, Brian Edward Zinn
  • Patent number: 9604261
    Abstract: An apparatus for removing a coating from a lengthwise section of an optical fiber includes a heater at least partially defining an elongate heating region configured for receiving the lengthwise section of the optical fiber, wherein the heater is configured for heating the heating region to a temperature above a thermal decomposition temperature of the at least one coating; a sensor configured for providing a signal indicative of explosive removal of the at least one coating from the lengthwise section of the optical fiber; and at least one device operatively associated with the sensor and the heater for receiving and processing the at least one signal from the sensor, and deactivating the heater. The at least one device may be configured for determining how much time passes between occurrence of the heater being deactivated and the at least one coating being removed from the lengthwise section of the optical fiber.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: March 28, 2017
    Assignee: Corning Optical Communications LLC
    Inventor: Qi Wu
  • Patent number: 9593259
    Abstract: A polishing composition of the present invention contains: a polyvinyl alcohol resin having a 1,2-diol structure in its side chain, the polyvinyl alcohol resin being a copolymer of a monomer represented by Formula (1) below and a vinyl ester monomer; an organic acid; and abrasive grains whose surfaces are chemically modified so as to have a minus zeta potential on the surfaces in a solution with a pH of 2.0 or more and to have no isoelectric point: (where R1 to R6 each independently denote a hydrogen atom or an organic group, X denotes a single bond or a linking group, and R7 and R8 each independently denote a hydrogen atom or R9—CO— (where R9 denotes an alkyl group)).
    Type: Grant
    Filed: November 19, 2013
    Date of Patent: March 14, 2017
    Assignee: NITTA HAAS INCORPORATED
    Inventor: Takayuki Matsushita
  • Patent number: 9595452
    Abstract: A method for selectively etching silicon oxide is provided. A surface reaction phase is provided comprising flowing a surface reaction gas comprising hydrogen, nitrogen and fluorine containing components to form silicon oxide into a compound comprising silicon, hydrogen, nitrogen, and fluorine, forming the surface reaction gas into a plasma, and stopping the flow of the surface reaction gas. The surface is wet treated to remove the compound.
    Type: Grant
    Filed: May 27, 2015
    Date of Patent: March 14, 2017
    Assignee: Lam Research Corporation
    Inventors: Chih-Hsun Hsu, Meihua Shen, Thorsten Lill
  • Patent number: 9594213
    Abstract: A method of forming an optical device includes using a photomask to form a first mask on a device precursor. The method also includes using the photomask to form a second mask on the device precursor. The second mask is formed after the first mask. In some instances, the optical device includes a waveguide positioned on a base. The waveguide is configured to guide a light signal through a ridge. A heater is positioned on the ridge such that the ridge is between the heater and the base.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: March 14, 2017
    Assignee: Mellanox Technologies Silicon Photonics Inc.
    Inventors: Wei Qian, Dazeng Feng, Cheng-Chih Kung, Jay Jie Lai
  • Patent number: 9586836
    Abstract: By means of a series of wet multistage oxidation process comprising: Step 1 for adding an alkaline reagent to an aqueous solution of a manganese compound containing a divalent manganese thereby precipitating a manganese hydroxide; Step 2 for adding an aqueous hydrogen peroxide while keeping the temperature of the water of the aqueous solution comprising the manganese hydroxide at room temperature thereby converting into a manganese oxide; and also Step 3 for adding a dilute acid to the manganese oxide in a state where the water is coexisting, a nanometer-sized manganese dioxide having a ramsdellite-type crystal structure is obtained.
    Type: Grant
    Filed: March 25, 2011
    Date of Patent: March 7, 2017
    Assignee: KYOTO UNIVERSITY
    Inventors: Hideki Koyanaka, Masahiko Tsujimoto
  • Patent number: 9583316
    Abstract: A method for processing substrate in a processing chamber, which has at least one plasma generating source and a gas source for providing process gas into the chamber, is provided. The method includes exciting the plasma generating source with an RF signal having RF frequency. The method further includes pulsing the gas source, using at least a first gas pulsing frequency, such that a first process gas is flowed into the chamber during a first portion of a gas pulsing period and a second process gas is flowed into the chamber during a second portion of the gas pulsing period, which is associated with the first gas pulsing frequency. The second process gas has a lower reactant-gas-to-inert-gas ratio relative to a reactant-gas-to-inert-gas ratio of the first process gas. The second process gas is formed by removing at least a portion of a reactant gas flow from the first process gas.
    Type: Grant
    Filed: December 10, 2015
    Date of Patent: February 28, 2017
    Assignee: Lam Research Corporation
    Inventor: Keren Jacobs Kanarik
  • Patent number: 9583356
    Abstract: A method for forming a semiconductor device structure is provided. The semiconductor device structure includes forming a film over a substrate. The semiconductor device structure includes forming a first mask layer over the film. The semiconductor device structure includes forming a second mask layer over the first mask layer. The second mask layer exposes a first portion of the first mask layer. The semiconductor device structure includes performing a plasma etching and deposition process to remove the first portion of the first mask layer and to form a protection layer over a first sidewall of the second mask layer. The first mask layer exposes a second portion of the film after the plasma etching and deposition process. The semiconductor device structure includes removing the second portion using the first mask layer and the second mask layer as an etching mask.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: February 28, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Keng-Ying Liao, Chung-Bin Tseng, Po-Zen Chen, Yi-Hung Chen, Yi-Jie Chen
  • Patent number: 9580818
    Abstract: The present invention relates to an etching solution for a multilayer thin film containing a copper layer and a molybdenum layer, and a method of etching a multilayer thin film containing a copper layer and a molybdenum layer using the etching solution. There are provided an etching solution for a multilayer thin film containing a copper layer and a molybdenum layer, including (A) an organic acid ion supply source containing two or more carboxyl groups and one or more hydroxyl groups in a molecule thereof, (B) a copper ion supply source and (C) an ammonia and/or ammonium ion supply source, the etching solution having a pH value of from 5 to 8, and an etching method using the etching solution.
    Type: Grant
    Filed: May 27, 2011
    Date of Patent: February 28, 2017
    Assignee: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Satoshi Tamai, Satoshi Okabe, Masahide Matsubara, Kunio Yube
  • Patent number: 9583652
    Abstract: A method for the wet-chemical etching of a highly doped silicon layer in an etching solution is provided. The method includes using, as an etching solution so as to perform etching homogeneously, an HF-containing etching solution containing at least one oxidizing agent selected from the group of peroxodisulfates, peroxomonosulfates, and hydrogen peroxide.
    Type: Grant
    Filed: September 2, 2011
    Date of Patent: February 28, 2017
    Assignee: CSEM CENTRE SUISSE D'ELECTRONIQUE ET DE MICROTECHNIQUE SA—RECHERCHE ET DEVÉLOPPEMENT
    Inventors: Agata Lachowicz, Berthold Schum, Knut Vaas
  • Patent number: 9583405
    Abstract: Methods and apparatus for spectrum-based endpointing. An endpointing method includes selecting a reference spectrum. The reference spectrum is a spectrum of white light reflected from a film of interest on a first substrate and has a thickness greater than a target thickness. The reference spectrum is empirically selected for particular spectrum-based endpoint determination logic so that the target thickness is achieved when endpoint is called by applying the particular spectrum-based endpoint logic. The method includes obtaining a current spectrum. The current spectrum is a spectrum of white light reflected from a film of interest on a second substrate when the film of interest is being subjected to a polishing step and has a current thickness that is greater than the target thickness. The method includes determining, for the second substrate, when an endpoint of the polishing step has been achieved. The determining is based on the reference and current spectra.
    Type: Grant
    Filed: August 21, 2015
    Date of Patent: February 28, 2017
    Assignee: Applied Materials, Inc.
    Inventors: Dominic J. Benvegnu, Jeffrey Drue David, Boguslaw A. Swedek
  • Patent number: 9567492
    Abstract: A chemical mechanical polishing (CMP) includes providing a slurry including composite particles dispersed in a water-based carrier that comprise a plurality of hard particles on an outer surface of a soft-core particle. The hard particles have a Mohs hardness at least 1 greater than a Mohs hardness of the soft core particle and/or a Vickers hardness at least 500 Kg/mm2 greater than the soft-core particle. A substrate having a substrate surface with a hardness greater than a Mohs number of 6 or a Vickers hardness greater than 1,000 kg/mm2 is placed into a CMP apparatus having a rotating polishing pad, and CMP is performed with the rotating polishing pad and the slurry to polish the substrate surface.
    Type: Grant
    Filed: August 28, 2014
    Date of Patent: February 14, 2017
    Assignees: Sinmat, Inc., University of Florida Research Foundation, Inc.
    Inventors: Rajiv K. Singh, Arul Chakkaravarthi Arjunan, Kannan Balasundaram, Deepika Singh, Wei Bai
  • Patent number: 9570326
    Abstract: A substrate cleaning method includes: a first step in which a cleaning liquid is ejected from a nozzle N2 to a central portion of a wafer W; a second step in which a dry gas is ejected from a nozzle N3 to the central portion of the wafer W to form a dry area; a third step in which the cleaning liquid is ejected from the nozzle N2 while the nozzle N2 is moved from a central side of the wafer W to a peripheral side thereof; a fourth step in which a width of an intermediate area generated between a wet area and the dry area is acquired; and a fifth step in which, when the width of the intermediate area exceeds a predetermined threshold value, a process parameter is changed such that the width of the intermediate area becomes the threshold value or less.
    Type: Grant
    Filed: December 15, 2014
    Date of Patent: February 14, 2017
    Assignee: Tokyo Electron Limited
    Inventors: Ryoichi Uemura, Yasushi Takiguchi