Abstract: A method for processing an asynchronous event by a checking device and a checking device are provided, the method including: obtaining an instruction position where a checked processor executes an asynchronous event during a target running process; and executing the asynchronous event at the instruction position during executing a task of the target running process in a manner conforming to predefined behavior, wherein the predefined behavior is a hardware behavior standard of the processor. Obtaining the instruction position and executing the asynchronous event at the instruction position may cause the checking device and the checked processor to process the same asynchronous event at the same instruction position. In this way, during performing security checking on a processor, the method and the device according to the embodiments of the present disclosure may be used to eliminate the influence of the uncertainty factor of the asynchronous event.

Abstract: A user program for a safety controller is created by means of a program editor. The user program has a first program portion and at least one additional program portion. The first program portion defines safety-related logical dependencies between selected sensor signals and actuator signals. The user program is compiled and linked, in order to obtain an executable original program code. The original program code is transferred to a first memory of the safety controller and executed by a processor of the safety controller. The first program portion may be modified and compiled in order to obtain a modified first code portion. The modified first code portion is transferred to a second memory of the safety controller while the original program code is executed. The modified first code portion is then executed in addition to the original additional code portion and instead of the original first code portion.

Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for restructuring an image processing pipeline. The method includes compiling program code targeted for an image processor having programmable stencil processors composed of respective two-dimensional execution lane and shift register circuit structures. The program code is to implement a directed acyclic graph and is composed of multiple kernels that are to execute on respective ones of the stencil processors, wherein the compiling includes performing any of: horizontal fusion of kernels; vertical fusion of kernels; fission of one of the kernels into multiple kernels; spatial partitioning of a kernel into multiple spatially partitioned kernels; or splitting the directed acyclic graph into smaller graphs.

Abstract: Embodiments of the present invention relate to a method, device and computer program product for container deployment. By comparing the target libraries required by a target container to be deployed and the libraries that have been loaded on the candidate hosts, the costs of deploying the target container on the candidate hosts can be estimated. Then a target host is selected from among the plurality of candidate hosts based on the determined costs.