Abstract: A display panel includes a substrate and a grating disposed on a light-emitting side of the display panel. The grating includes a plurality of protruding portions and a plurality of interval portions, each interval portion is located between two adjacent protruding portions. The plurality of protruding portions are arranged on the substrate along a first direction, and each protruding portion extends along a second direction perpendicular to the first direction. Each protruding portion includes an outer surface and a bottom surface; the outer surface is a smooth curved surface, and the bottom surface is a flat surface. A cross-sectional figure of each protruding portion along a thickness direction of the display panel is a first figure; the first figure includes a curve and a bottom edge, and the first figure is a closed figure formed by the curve and the bottom edge.

Abstract: According to one embodiment, a display device includes a substrate, a lower electrode, a rib, a partition including a lower portion and an upper portion, an organic layer provided on the lower electrode and including a light emitting layer, and an upper electrode provided on the organic layer and in contact with the lower portion of the partition. The organic layer includes a first end portion located on the rib, and a second end portion located on the rib on an opposite side of the first end portion. A thickness of the upper electrode immediately above the second end portion is greater than a thickness of the upper electrode immediately above the first end portion.

Abstract: A display panel includes a switching transistor and a light-emitting transistor. The switching transistor includes a first gate electrode, a first source electrode, a first active layer, and a first drain electrode. The light-emitting transistor includes a second gate electrode, a second source electrode, a second active layer, a light-emitting layer, and a second drain electrode. The second gate electrode is the first drain electrode of the switching transistor. The switching transistor and the light-emitting transistor may be on a substrate. The switching transistor, the second source electrode, the second active layer, the light-emitting layer, and the second drain electrode are stacked in a direction perpendicular to the surface of the substrate.

Abstract: A semiconductor device and method of forming the same are disclosed. The semiconductor device includes a fin structure, a gate electrode, a source-drain region, a plug and a hard mask structure. The gate electrode crosses over the fin structure. The source-drain region in the fin structure is aside the gate electrode. The plug is disposed over and electrically connected to the gate electrode. The hard mask structure surrounds the plug and is disposed over the gate electrode, wherein the hard mask structure includes a first hard mask layer and a second hard mask layer, the second hard mask layer covers a sidewall and a top surface of the first hard mask layer, and a material of the first hard mask layer is different from a material of the second hard mask layer.

Abstract: A display apparatus includes: a substrate including a first area, and a second area adjacent to the first area; a plurality of first pixel circuits at the first area of the substrate, each of the plurality of first pixel circuits including a silicon-based transistor, and an oxide-based transistor; a plurality of second pixel circuits at the second area of the substrate, the plurality of second pixel circuits including transistors; a first shielding layer at the first area, the first shielding layer including a shielding pattern overlapping with the silicon-based transistor of each of the plurality of first pixel circuits; and a second shielding layer at the second area, the second shielding layer including a first through-hole between adjacent second pixel circuits from among the plurality of second pixel circuits. The first shielding layer and the second shielding layer include different materials from each other.

Abstract: Disclosed herein is a micro light emitting diode (microLED) display structure with emission from the back side of a transparent substrate, which can be manufactured by fluidic assembly. The architecture allows microLED displays or display tiles to be fabricated simply, with processing and interconnection only on one side of the backplane. The structure may incorporate reflectors in the fluidic assembly structures to direct substantially all of the emitted light toward the viewer. Also disclosed are microLEDs and emission backplanes designed to support a back emission display.

Abstract: Embodiments of three-dimensional memory device architectures and fabrication methods therefore are disclosed. In an example, the memory device includes a substrate having a first layer stack on it. The first layer stack includes alternating conductor and insulator layers. A second layer stack is disposed over the first layer stack where the second layer stack also includes alternating conductor and insulator layers. One or more vertical structures extend through the first layers stack. A conductive material is disposed on a top surface of the one or more vertical structures. One or more second vertical structures extend through the second layer stack and through a portion of the conductive material.

Abstract: A display device includes a first pixel electrode, a bank layer defining a first opening exposing at least a portion of the first pixel electrode, a first intermediate layer arranged on the first pixel electrode in the first opening and which emits light including light of a first wavelength, an opposite electrode arranged on the first intermediate layer and including a first region overlapping the first intermediate layer in a plan view, and an upper substrate arranged on the opposite electrode. An optical distance D1 between the first region and the upper substrate satisfies the equation below: D1=A+(?1)/2×n, where A denotes the minimum optical distance between the first region and the upper substrate at a point where light of ?1 has a maximum intensity, n is an integer equal to or greater than 0, and ?1 denotes the first wavelength.

Abstract: A display device includes: a base substrate having a display region including a first region and a second region, and a non-display region; a first semiconductor layer including polysilicon at the second region; a first conductive layer on a first insulating layer, and including a bottom gate electrode at the first region and a second-first gate electrode at the second region; a second semiconductor layer including an oxide on a second insulating layer at the first region; a second conductive layer on a third insulating layer, and including a top gate electrode at the first region and a second-second gate electrode at the second region; and a third conductive layer on a fourth insulating layer, and including a first source electrode and a first drain electrode connected to the second semiconductor layer, and a second source electrode and a second drain electrode connected to the first semiconductor layer.

Abstract: A light emitting device includes: a lightguide plate including a first surface on which a plurality of first recesses are provided; a light-reflective resin layer located on a bottom portion of each first recess; a plurality of light emitting elements each having an upper surface and a lateral surface, wherein each one of the plurality of light emitting elements is arranged in a corresponding one of the plurality of first recesses; and a plurality of wavelength conversion members, wherein: the upper surface of each light emitting element is attached to the light-reflective resin layer; and each of the plurality of wavelength conversion members covers the lateral surface of the light emitting element in the first recess.

Abstract: A display panel includes a substrate, and a pixel defining layer and a cathode layer that are laminated on the substrate. The pixel defining layer includes a plurality of strip-shaped first pixel defining structures and a plurality of strip-shaped second pixel defining structures. A slope angle of the second pixel defining structure is greater than a slope angle of the first pixel defining structure, and the second pixel defining structure is configured to separate portions of the cathode layer on two sides of the second pixel defining structure.

Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a first hard mask on the first barrier layer; removing the first hard mask and the first barrier layer to form a recess; forming a second barrier layer in the recess; and forming a p-type semiconductor layer on the second barrier layer.

Abstract: Provided is an organic light-emitting display apparatus in which a dead space may be reduced. The organic light-emitting display apparatus includes: a substrate including a first display area, a second display area disposed outside of the first display area, and a third display area disposed outside of the second display area; a first thin-film transistor disposed in the first display area on the substrate; a second thin-film transistor and a third thin-film transistor each arranged in the second display area on the substrate; a first pixel electrode arranged in the first display area on the substrate and electrically connected to the first thin-film transistor; a second pixel electrode arranged in the second display area on the substrate and electrically connected to the second thin-film transistor; and a third pixel electrode arranged in the third display area on the substrate and electrically connected to the third thin-film transistor.

Abstract: A method of manufacturing a display apparatus includes forming a first conductive layer on a base substrate including a panel area and a margin area disposed next to the panel area, the margin area including a dummy pattern area, forming a photoresist layer on the first conductive layer, forming a photoresist pattern by exposing and developing the photoresist layer, forming a first conductive pattern by etching the first conductive layer using the photoresist pattern, and removing the photoresist pattern. The forming the first conductive pattern includes forming a first pixel circuit pattern in the panel area, and forming a dummy pattern in the dummy pattern area of the margin area. An opening ratio of a portion where the dummy pattern is not formed with respect to the dummy pattern area is about 30% or more.

Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, an electronic package comprises a package substrate, wherein the package substrate comprises a first routing architecture. In an embodiment, the electronic package further comprises a first die on the package substrate, a second die on the package substrate, wherein the first die is electrically coupled to the second die by a bridge embedded in the package substrate, and a routing patch on the package substrate. In an embodiment, the routing patch is electrically coupled to the second die, and wherein the routing patch comprises a second routing architecture that is different than the first routing architecture.

Abstract: Provided are a thin film transistor substrate which include a substrate, a buffer layer and a thin film transistor, a display apparatus including the thin film transistor substrate, and a method of manufacturing the display apparatus including the thin film transistor substrate. The buffer layer includes an inorganic insulating layer. An area ratio of a peak corresponding to an N—H bond in the buffer layer is 0.5% or less based on a total peak area in a Fourier transform infrared spectroscopy (FTIR).

Abstract: A display device may include a substrate, an organic light emitting layer overlapping the substrate and including an opening, and a holed insulating layer positioned between the substrate and the organic light emitting layer. The holed insulating layer may include a first through hole, a first groove, and a first undercut. A position of the opening may overlap a position of the first groove. The first groove may surround the first through hole in a plan view of the display device. The first undercut may surround the first groove in the plan view of the display device.

Abstract: The present disclosure relates to a display device and a method of manufacturing the same, the display device including: a substrate including a pixel area and a non-pixel area adjacent to the pixel area; a power line formed on the substrate; at least one insulation layer covering the power line; a connection electrode formed on the at least one insulation layer, and connected to the power line through a contact hole; an overcoat layer placed above the connection electrode in the pixel area; and a first electrode placed above the overcoat layer, wherein the connection electrode has at least an area formed in the non-pixel area, and the first electrode extends to the non-pixel area and is connected to the connection electrode.

Abstract: Stacked semiconductor die assemblies with support members and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die assembly can include a package substrate, a first semiconductor die attached to the package substrate, and a plurality of support members also attached to the package substrate. The plurality of support members can include a first support member and a second support member disposed at opposite sides of the first semiconductor die, and a second semiconductor die can be coupled to the support members such that at least a portion of the second semiconductor die is over the first semiconductor die.

Abstract: A display apparatus includes: a semiconductor layer on a substrate; a gate insulating layer on the substrate and covering the semiconductor layer; a gate electrode on the gate insulating layer and at least partially overlapping the semiconductor layer; an interlayer insulating layer on the gate electrode; and an electrode layer on the interlayer insulating layer and electrically connected to the semiconductor layer, wherein the interlayer insulating layer comprises a first portion and a second portion extending from the first portion, and the electrode layer is on the first portion of the interlayer insulating layer, and a step is provided by a difference in thicknesses of the first portion and the second portion.