Patents Examined by Eduardo Garcia-Otero
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Patent number: 6925426Abstract: A local performance simulation system simulates an ensemble sound pattern. The simulation system includes a signal generation system for simultaneously generating contact recording signals based on vibrations from the ensemble, where the ensemble produces an ensemble sound pattern. A signal processing system channelizes the contact recording signals and generates final instrument signals based on the channelized contact recording signals. The simulation system further includes a reproduction system with dedicated loudspeaker systems for generating audible sound waves based on the final instrument signals, where the sound waves simulate the ensemble sound pattern. Contact recording the vibrations and channelizing the contact recording signals eliminates all reverberation and reflection effects of the recording environment from the contact recording signals.Type: GrantFiled: February 22, 2000Date of Patent: August 2, 2005Assignee: Board of Trustees operating Michigan State UniversityInventor: William M. Hartmann
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Patent number: 6910002Abstract: In one embodiment, a method for specifying addressability in a memory-mapped device is disclosed. A data access primitive is used to model addressablity for the memory-mapped device. Addressability comprises an address matching function, a lane matching function and one or more bus connections. A first starting address for the memory-mapped device is specified. A first set of addressing matching function, lane matching function and one or more bus connections for the memory-mapped device is generated using the data access primitive and the first starting address.Type: GrantFiled: August 23, 2000Date of Patent: June 21, 2005Assignee: Xilinx, Inc.Inventors: Bart Reynolds, Cheng-I Chuang, Chukwuweta Chukwudebe, Sridhar Krishnamurthy, Damon McCormick, Tom Shui, Kai Zhu
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Patent number: 6879943Abstract: This invention is to provide an information processing system and method in which when the paper size of a document is to be changed, layout constituent elements are rearranged while keeping margin sizes unchanged and keeping a predetermined ratio between the shape of the effective area and the shape of each layout constituent element, thereby freely and easily setting the shape of each object frame as a layout constituent element without entering the binding margin or the physical printing disable area. In rearranging a plurality of layout constituent elements in a document on the basis of an instruction for changing the paper size of the document, the effective area size of the document after the change in paper size is calculated. On the basis of the calculated effective area size, the size and position of each layout constituent element are calculated such that a margin of the document becomes constant before and after the change in paper size.Type: GrantFiled: October 22, 1999Date of Patent: April 12, 2005Assignee: Canon Kabushiki KaishaInventor: Yuriyo Shigemori
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Patent number: 6862565Abstract: A method and an apparatus allows complete and efficient verification of cross-architecture ISA emulation. A random verification framework runs concurrently on two different computer architectures. The framework operates without regard to existing native applications and relies instead on binary instructions in a native ISA. The framework determines emulation errors at a machine instruction level. A random code generator generates one or more sequences of native machine instructions and corresponding initial machine states in a pseudo-random fashion. The native instructions are generated from an entire set of the native ISA. The instructions and the state information are provided to initialize a native computer architecture. The same instructions and state information are provided using standard machine-to-machine languages, such as TCP/IP, for example, to a target computer architecture. A binary emulator then translates the native instructions so that the instructions may be executed on the target computer.Type: GrantFiled: April 13, 2000Date of Patent: March 1, 2005Assignee: Hewlett-Packard Development Company, L.P.Inventor: Qinghua Zheng
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Patent number: 6748349Abstract: A general purpose program implemented on a computer analyzes steady state and transient flow in a complex fluid network, modeling phase changes, compressibility, mixture thermodynamics and external body forces such as gravity and centrifugal force. A preprocessor provides for the interactive development of a fluid network simulation having nodes and branches. Mass, energy, and specie conservation equations are solved at the nodes, and momentum conservation equations are solved in the branches. Contained herein are subroutines for computing “real fluid” thermodynamic and thermophysical properties for 12 fluids, and a number of different source options are provided for modeling momentum sources or sinks in the branches. The system of equations describing the fluid network is solved by a hybrid numerical method that is a combination of the Newton-Raphson and successive substitution methods.Type: GrantFiled: May 7, 1999Date of Patent: June 8, 2004Assignee: The United States of America as represented by the Administrator of the National Aeronautics and Space AdministrationInventors: Alok Kumar Majumdar, John W. Bailey, Paul Alan Schallhorn, Todd E. Steadman
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Patent number: 6748348Abstract: In the design method for nuclear reactor fuel management, nuclear reactor operation for sets of independent control variable values is simulated to produce associated sets of dependent performance variable values. Transfer functions are generated based on the sets of independent control variable values and the sets of dependent performance variable values. The transfer functions represent relationships between the independent control variables and the dependent performance variables. Additional sets of dependent performance variable values are then generated for additional sets of independent control variable values using the generated transfer functions. A set of independent control variable values for possible use in operating a nuclear reactor is then determined based on the sets of dependent performance variable values and the additional sets of dependent performance variable values.Type: GrantFiled: December 30, 1999Date of Patent: June 8, 2004Assignee: General Electric CompanyInventor: William E. Russell, II
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Patent number: 6714901Abstract: An electronic device for processing image data, particularly image data pertaining to medical procedures, includes a user interface with force feedback (4) corresponding to tool reactions, a “collision” module (18) for estimating a point of intersection between a straight line embodying a displacement derived from the action of the tool and a surface mesh of a given object, and an internal forces module (16) which estimates internal forces exerted on nodes of a first part of at least a volume mesh of the object, on the basis of a displacement applied on nodes pertaining to the surface mesh containing a point of intersection, of boundary conditions, and of node tensors and link tensors, from matrices of rigidity, and a reaction module (20) for determining the reaction force of the object corresponding to its deformation estimated on the basis of the internal forces, such that the force generated by the user interface (4) is balanced by reaction force.Type: GrantFiled: July 16, 1999Date of Patent: March 30, 2004Assignee: Inria Institut National de Recherche en Informatique et en AutomatiqueInventors: StĂ©phace Cotin, HervĂ© Delingette, Nicholas Ayache
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Patent number: 6704695Abstract: A method and structure for creating a photomask data set includes inputting a design data set, creating a simulated printed data set by applying a lithography simulation model to chosen levels of the design data set, merging each chosen level of the design data set with each corresponding level of the simulated printed data set in order to produce a merged design data set, applying at least one test to the merged design data set, correcting the design data set based on results of the test to produce a corrected design data set, repeating the creating of the simulated printed data, merging, applying the test and correcting using the corrected design data set until the corrected design data set passes the test, and outputting the corrected design data set as the photomask data set.Type: GrantFiled: July 16, 1999Date of Patent: March 9, 2004Assignee: International Business Machines CorporationInventors: Orest Bula, Daniel C. Cole, Edward W. Conrad, William C. Leipold
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Patent number: 6701288Abstract: A method and apparatus for designing and editing a distribution system for a building is disclosed. Elements of such distribution systems and requirements of relevant standard, are stored in a computer's memory. Building parameters are entered into a computer manually. The user identify the standard to be followed and the element to be optimized. The system divides the building into sections as appropriate to the user identified standard. The system then computes layout needed to comply with the selected standard. The layout is routed and sized to avoid building structural members, yet the elements of the layout are optimized for size and length. The apparatus prints out a hard copy of the design layout which can include an elements listing needed to complete the system. The design layout as well as the building parameters can be edited. The edited layout is checked for compliance with the identified standard as well as avoidance of building parameters.Type: GrantFiled: September 13, 2000Date of Patent: March 2, 2004Assignee: First Graphics, Inc.Inventors: Linda M. Normann, Charles L. Hines, III, Gene Michael Cox
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Patent number: 6662144Abstract: A method and apparatus for designing and editing a distribution system for a building is disclosed. Elements of such distribution systems and requirements of relevant standard, are stored in a computer's memory. Building parameters are entered into a computer manually. The user identify the standard to be followed and the element to be optimized. The system divides the building into sections as appropriate to the user identified standard. The system then computes layout needed to comply with the selected standard. The layout is routed and sized to avoid building structural members, yet the elements of the layout are optimized for size and length. The apparatus prints out a hard copy of the design layout which can include an elements listing needed to complete the system. The design layout as well as the building parameters can be edited. The edited layout is checked for compliance with the identified standard as well as avoidance of building parameters.Type: GrantFiled: July 24, 2000Date of Patent: December 9, 2003Assignee: First Graphics, Inc.Inventors: Linda M. Normann, Charles L. Hines, III, Gene Michael Cox
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Patent number: 6662145Abstract: A method, equipment, and a recording medium of controlling exposure accuracy enabling position accuracy to be around ±15 nm by double exposures under different optical conditions. The first exposure is carried out under an optical condition A1 suitable for dense patterns, that is 30-40% the total quantity of light. This optical condition A1 can be optimized by change in the pattern size and the photoresist. After cleaning for restoring the elongation of the wafer and changing the illuminating optical system, the second exposure is carried out under an optical condition B1 suitable for sparse patterns, that is 70-60% the total quantity of light. By this the positioning error of the reticle scan stage, which is a cause of misalignment, is eliminated, and in addition, error caused by the expansion/contraction of the wafer due to cleaning can also be eliminated. As a result, resolution can be improved without lowering the throughput.Type: GrantFiled: June 11, 1999Date of Patent: December 9, 2003Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Yoshikatu Tomimatu
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Patent number: 6643615Abstract: A method for providing producibility information to a user during a design process includes providing process capability models with integrated coaching information and providing a producibility evaluation worksheet having at least one input and at least one output, the input being selectable to represent a specific design. The worksheet is initialized with a relevant process capability model that is used to determine a producibility measure indicating an effect of the input on the output. The producibility measure is then displayed to the user.Type: GrantFiled: July 9, 1999Date of Patent: November 4, 2003Assignee: General Electric CompanyInventors: Lowell Wilson Bauer, Marc Thomas Edgar
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Patent number: 6601024Abstract: An HDL-based ASIC design is translated from a first RTL description to a second RTL description. The first RTL description describes the HDL-based ASIC design through a first set of modules arranged in a hierarchical manner. Translation includes: creating a reference gate-level netlist by synthesizing the HDL-based ASIC design described using the first RTL description; creating a second set of modules by translating the first RTL description of the first set of modules to the second RTL description module by module; and creating a combined RTL and gate-level design by integrating at least one module from the second set of modules within the reference gate-level netlist. Each module translated into the second RTL description may be also checked for compilation warning or error messages. If any warning or error messages are generated, the offending module(s) is modified to eliminate the warning or error messages.Type: GrantFiled: November 12, 1998Date of Patent: July 29, 2003Assignee: Synopsys, Inc.Inventors: Shivakumar Shankar Chonnad, Thomas Warren Savage, Manickam E. Kandaswamy, Maulin Bhatt, Christopher A. Kopetzky