Abstract: A method includes providing an electrically conductive mandrel having an outer surface layer comprising a preformed pattern. The metallic article is electroformed. The metallic article includes a plurality of electroformed elements formed in the preformed pattern on the outer surface layer of the mandrel. The plurality of electroformed elements have a first side adjacent to the outer surface layer of the mandrel and a second side. The metallic article is separated from the mandrel. The plurality of electroformed elements are interconnected such that the metallic article forms a unitary, free-standing piece. A solution is applied to create a blackening of the first side of the plurality of electroformed elements.

Abstract: In a flip-chip LED assembly having an array of LEDs formed on the same substrate, different LEDs of the array have different distances to the n-contacts of the assembly. This may cause current crowding as current has to spread from the n-contacts through the substrate to each the farthest LEDs of the LED array, requiring LEDs that are farther away to be driven with a higher voltage in order to receive a desired amount of current. To spread current more evenly through the LED assembly and reduce a voltage difference between the closest and farthest LEDs of the array, a current spreading layer having a conductive material (e.g., a conductive oxide) is formed on a surface of the substrate of the LED assembly. The current spreading layer may be a bulk layer or be patterned to increase light extraction from the LEDs of the array.

Abstract: A method for producing a sealed optical semiconductor device includes: placing inner and outermost layer sealing films on a substrate on which an optical semiconductor element is mounted within a pressure reduction chamber, and reducing the pressure; a step in which the outermost film is heated, and at least the periphery of the outermost film is thermally fused to the surface of the substrate; and a step in which the reduction of pressure is released, and the substrate is sealed by the outermost film and the inner film. The temperature T2 of the substrate when the reduction of pressure is released is a temperature at which the outermost film exhibits a tensile strength of 0.02-0.15 MPa and an elongation at break of 200-450%. The inner film exhibits a loss tangent (tan ?) of 1.6 or more at the temperature T2.

Abstract: A method of transferring a plurality of mero light emitting diodes (micro LEDs) to a target substrate s provided. The method includes providing a plurality of transfer strips, a respective one of the plurality of transfer strips including a plurality of holding cells sequentially arranged along a first direction; transferring a plurality of micro LEDs onto the plurality of holding cells of the plurality of transfer strips; and aligning the plurality of transfer strips having the plurality of micro LEDs transferred thereon with respect to each other, to form an array of micro LEDs in which micro LEDs from different transfer strips of the plurality of transfer strips we aligned along a second direction and micro LEDs from a same transfer strip of the plurality of transfer strips are aligned along the first direction, the second direction being different from the first direction.

Abstract: The present disclosure provides a light conversion substrate and a manufacturing method thereof, and a display panel. The light conversion substrate may include a substrate having a first surface and a second surface arranged opposite to each other. A plurality of first grooves may be defined on the first surface of the substrate. A plurality of second grooves may be defined on the second surface of the substrate. The plurality of first grooves and the plurality of second grooves are arranged alternately. A first light conversion body may be arranged in each of the plurality of first grooves. A second light conversion body ma be arranged in each of the plurality of second grooves. In the present disclosure, light conversion materials may not interfere with each other during the manufacturing method, so that the present disclosure may be suitable for a display panel with high pixel density.

Abstract: An optoelectronic component, having an optoelectronic semiconductor chip, includes a substrate, wherein at least two light-emitting sections are arranged laterally next to one another over an upper side of the substrate, the light-emitting sections are separately controllable, the light-emitting sections generate electromagnetic radiation from different spectral ranges, the light-emitting sections are formed by a layer sequence, an active region is formed inside the layer sequence, trenches are formed between the light-emitting sections, and the trenches fully divide the active region so that the light-emitting sections are separated from one another.

Abstract: A method for exposing side surfaces of a semiconductor body is disclosed. In an embodiment a method includes providing the semiconductor body having a laterally extending first main surface, forming a plurality of vertical side surfaces by partially removing material of the semiconductor body and thereby removing the first main surface in places, wherein each of the side surfaces forms an angle (?) between 110° and 160° inclusive with the remaining first main surface, applying a protective layer onto the semiconductor body so that, in a plan view, the protective layer completely covers the remaining first main surface and the obliquely formed side surfaces and partially removing the protective layer so that the protective layer is removed in regions on the obliquely formed side surfaces because of an inclination and remains at least partially preserved in regions on the remaining first main surface during a common process operation.

Abstract: Examples of an integrated circuit a having an advanced two-dimensional (2D) metal connection with metal cut and methods of fabricating the same are provided. An example method for fabricating a conductive interconnection layer of an integrated circuit may include: patterning a conductive connector portion on the conductive interconnection layer of the integrated circuit using extreme ultraviolet (EUV) lithography, wherein the conductive connector portion is patterned to extend across multiple semiconductor structures in a different layer of the integrated circuit; and cutting the conductive connector portion into a plurality of conductive connector sections, wherein the conductive connector portion is cut by removing conductive material from the metal connector portion at one or more locations between the semiconductor structures.

Abstract: One embodiment of the disclosure relates to an unguarded Schottky barrier diode. The diode includes a cathode that has a recessed region and a dielectric interface surface that laterally extends around a perimeter of the recessed region. The diode further includes an anode that conforms to the recessed region. A dielectric layer extends over the dielectric interface surface of the cathode and further extends over a portion of the anode near the perimeter. Other devices and methods are also disclosed.

Abstract: Integrated active-matrix light emitting pixel arrays based displays and methods of fabricating the integrated displays are provided. An example method includes: forming multiple layers on a first substrate to form a light emitting structure, integrating the light emitting structure on the first substrate with a backplane device on a second substrate by connecting a first top layer of the light emitting structure with a second top layer of the backplane device, e.g., by using low temperature bonding, the backplane device including at least one backplane having pixel circuits, and after the integration, patterning the light emitting structure to form an array of light emitting elements each conductively coupled to respective pixel circuits to thereby form an array of active-matrix light emitting pixels. A pattern of different color phosphor or different size quantum dots materials can be deposited on the light emitting pixels to form an array of multi-color display pixels.

Abstract: Method and structure of forming a vertical FET. The method includes depositing a bottom source-drain layer over a substrate; depositing a first heterostructure layer over the bottom source-drain layer; depositing a channel layer over the first heterostructure layer; depositing a second heterostructure layer over the channel layer; forming a first fin having a hard mask; recessing the first and the second heterostructure layers to narrow them; filling gaps with an inner spacer; laterally trimming the channel layer to a narrower width; depositing a bottom outer spacer over the bottom source-drain layer; depositing a high-k layer on the bottom outer spacer, the first fin, and the hard mask; and depositing a metal gate layer over the high-k and top outer spacer to produce the vertical FET. Forming another structure by recessing the metal gate layer below the second inner spacer.

Abstract: This invention relates to cooling devices for multi-chip semiconductor devices, system-on-a-package devices, and other packaged devices. Because of the non-uniform height across the surface in such large-chip and multi-chip assemblies, providing heat exchange can be troublesome. Many air cooled heat sinks are too stiff to adapt to such non-uniform or warped shapes of chips or to shape-changing chip surfaces during operation. In the present disclosure, application of a mechanical load perpendicular to the chip plane causes certain features to flex and adapt to the non-uniform height of the chip plane, providing improved heat exchange.

Abstract: A semiconductor device and method that comprise a first dielectric layer over a encapsulant that encapsulates a via and a semiconductor die is provided. A redistribution layer is over the first dielectric layer, and a second dielectric layer is over the redistribution layer, and the second dielectric layer comprises a low-temperature polyimide material.

Abstract: A method of manufacturing a redistribution circuit structure and a method of manufacturing an INFO package at least include the following steps. An inter-dielectric layer is formed over a substrate. A seed layer is formed over the inter-dielectric layer. A plurality of conductive patterns are formed over the seed layer. The seed layer and the conductive patterns include a same material. While maintain a substantially uniform pitch width in the conductive pattern, the seed layer exposed by the conductive patterns is selectively removed through a dry etch process to form a plurality of seed layer patterns. The conductive patterns and the seed layer patterns form a plurality of redistribution conductive patterns.

Abstract: The present invention includes: preparing a semiconductor substrate having a first main surface and a second main surface that is located on an opposite side of the first main surface; forming a first electrode on the first main surface; forming a solder-bonding metal film (a first solder-bonding metal film) on the first electrode; forming a sacrificial film on the first solder-bonding metal film; grinding the second main surface after forming the sacrificial film; performing heat treatment after the grinding (forming an element structure on the third main surface side); removing the sacrificial film after the performing heat treatment; and solder-bonding the first solder-bonding metal film and a first external electrode.

Abstract: Methods and apparatus for use in the manufacture of a display device including pixels. Each pixel includes a plurality of sub-pixels, each sub-pixel configured to provide light of a given wavelength. The method may include: performing, using a pick up tool (PUT), a first placement cycle comprising picking up first light emitting diode (LED) dies, and placing a first LED die on a substrate of the display device at a location corresponding to a sub-pixel the display device. The method further includes performing one or more subsequent placement cycles comprising picking up a second LED die, and placing the second LED die on the substrate of the display device at a second location corresponding to the sub-pixel of the display device. Multiple first and second LED dies may be picked and placed during each placement cycle to populate each pixel of the display device to provide redundancy of LED dies at each sub-pixel.

Abstract: An organic light emitting display can include a substrate, a first capacitor formed on the substrate, the first capacitor including a first capacitor lower electrode, a first capacitor upper electrode, and a gate insulating layer between the first capacitor lower upper electrodes, a first passivation layer over the first capacitor, a second capacitor on the first passivation layer, the second capacitor including a second capacitor lower electrode, a second capacitor upper electrode, and a second passivation layer interposed between the second capacitor lower upper electrodes, an organic insulating layer over the second capacitor, a pixel electrode on the organic insulating layer, an organic layer on the pixel electrode, the organic layer including at least a light emitting layer, and an opposite electrode on the organic layer, and the width of the second capacitor lower electrode is greater than that of the second capacitor upper electrode.

Abstract: A display apparatus and a method of manufacturing a display apparatus, the apparatus including a plurality of pixels on a substrate, wherein a first pixel of the plurality of pixels includes a scanning line extending in a first direction; a plurality of wires extending in a second direction crossing the first direction; at least one insulating layer between the scanning line and the plurality of wires; a thin film transistor electrically connected to the scanning line and the plurality of wires; and a pixel electrode electrically connected to the thin film transistor, wherein at least one of the plurality of wires includes a first line and a second line spaced apart from each other in the second direction, and a connection line electrically connecting the first line and the second line, the at least one insulating layer being between the connection line and the first and second lines.

Abstract: An organic light emitting display apparatus includes a substrate; an anode electrode on the substrate; an auxiliary electrode on the substrate; an organic emission layer on the anode electrode; a cathode electrode on the organic emission layer and on the auxiliary electrode; an insulating bank on the auxiliary electrode, the bank overlapping a first portion of the auxiliary electrode and exposing a second portion of the auxiliary electrode; a first partition wall on the auxiliary electrode; a second partition wall on the first partition wall and covering the exposed second portion of the auxiliary electrode in plan view. A separation space is between the second partition wall and the bank, the cathode electrode is electrically connected to the auxiliary electrode through the separation space between the second partition wall and the bank, and the second partition wall is supported by the first partition wall and the bank.

Abstract: Receiving structure for electrically connecting a nano-object on a surface thereof and re-establish electrical contact with the nano-object on the opposite surface, and methods for manufacturing the structure. The invention, that can be used for molecular characterisation, makes use of a support (44) to connect a nano-object (50) onto its top face and continue the electrical contact on its bottom face. At least two interconnects (52, 54) pass through the support. The two faces of the support comprise contact continuity zones (56, 58, 60, 62) for the interconnects. According to the invention, at least the zones (56, 58) in the top face are doped zones each having a pattern adapted to the fan out of the interconnect associated with it, on this face.