Patents Examined by Elmira Mehrmanesh
  • Patent number: 11740955
    Abstract: Embodiments of the present disclosure relate to a method for providing log information, an electronic device, and a computer program product.
    Type: Grant
    Filed: May 11, 2020
    Date of Patent: August 29, 2023
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Adona Li Sun, Qingxiao Zheng, Bing Bai, Sager Liao, Beryl Wang, Jing Wang
  • Patent number: 11728828
    Abstract: A method and system for decoding low density parity check (“LDPC”) codes. An LDPC code decoder includes LDPC decoding circuitry comprising a Q message generator and a P sum adder array. The Q message generator combines an R message from a previous iteration with a P message to produce a Q message. The P sum adder array adds the P message to a difference of an R message from a current iteration and the R message from the previous iteration to produce an updated P message.
    Type: Grant
    Filed: May 13, 2022
    Date of Patent: August 15, 2023
    Assignee: The Texas A&M University System
    Inventors: Kiran Kumar Gunnam, Gwan S. Choi
  • Patent number: 11726864
    Abstract: In a data processing device comprising a memory controller controlling writing/reading of data to/from the memory, a processor requesting writing/reading of data, and an error detection module requesting writing/reading of data to/from the memory controller in accordance with a request from the processor, an error detection module calculates a first error detection code of the first data having a write request from the processor, reads the second data having a read request from the processor from the memory, calculates a second error detection code from the read data, compares the first error detection code and the second error detection code, and transmits the result of the comparison to the external module.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: August 15, 2023
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Katsushige Matsubara, Ryoji Hashimoto, Takahiro Irita, Kenichi Shimada, Tetsuya Shibayama
  • Patent number: 11720432
    Abstract: Systems and methods for detecting and managing incidents are disclosed. In one embodiment, a method for detecting an incident includes receiving issue data created for an issue tracking system; analyzing the received issue data over a predetermined interval; determining whether a potential incident has occurred based on the analysis; upon determining that a potential incident has occurred, creating an incident management assistant program; identifying one or more relevant users to communicate an alert to; and communicating the alert to the identified relevant users, the alert including a pointer to the incident management program.
    Type: Grant
    Filed: February 4, 2022
    Date of Patent: August 8, 2023
    Assignees: ATLASSIAN PTY LTD., ATLASSIAN US, INC.
    Inventors: Matthew David Hunter, Matthew Craig Saxby, Michael David Howells
  • Patent number: 11709737
    Abstract: Techniques for identifying and remedying performance issues of Virtualized Network Functions (VNFs) are discussed. An example method includes outputting a request to a network Element Manager (EM) to create a Virtualized Network Function (VNF) Performance Measurement (PM) job to collect VNF PM data from a VNF and receiving a set of VNF PM data associated with the VNF from the EM. The set of VNF PM data is processed associated with the VNF. A request to the EM is output to create a Virtualization Resource (VR) PM job to collect, through a VNF Manager (VNFM) and a virtualized infrastructure manager (VIM), VR PM data from a VR used by the VNF. Then a set of VR PM data is received from the EM and processed.
    Type: Grant
    Filed: May 16, 2022
    Date of Patent: July 25, 2023
    Assignee: Apple Inc.
    Inventors: Joey Chou, Stephen Gooch, Meghashree Dattatri Kedalagudde
  • Patent number: 11709202
    Abstract: Existing multi-wire debugging protocols, such as 4-wire JTAG, 2-wire cJTAG, or ARM SWD, are run through a serial wireless link by providing the debugger and the target device with hardware interfaces that include UARTs and conversion bridges. The debugger interface serializes outgoing control signals and de-serializes returning data. The target interface de-serializes incoming control signals and serializes outgoing data. The actions of the interfaces are transparent to the inner workings of the devices, allowing re-use of existing debugging software. Compression, signal combining, and other optional enhancements increase debugging speed and flexibility while wirelessly accessing target devices that may be too small, too difficult to reach, or too seal-dependent for a wired connection.
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: July 25, 2023
    Assignee: Intel Corporation
    Inventors: Sankaran M. Menon, Bradley H. Smith, Jinshi Huang, Rolf H. Kuehnis
  • Patent number: 11681600
    Abstract: In performance testing a data storage system, operating parameters and performance data are recorded as the system executes performance tests over a test period, where the performance data includes measures of a performance characteristic (e.g., latency) across a range of I/O operation rates or I/O data rates for each performance test. Subsets of recorded operating parameters and performance data are selected and applied to a machine learning model to train and use the model, and the model provides a model output indicative for each performance test of a level of validity of the corresponding performance data. Based on the model output indicating at least a predetermined level of validity for a given performance test, the performance data for the performance test are incorporated into a record of validated performance data for the data storage system, usable for benchmarking, regression analysis, hardware qualification, etc.
    Type: Grant
    Filed: July 28, 2021
    Date of Patent: June 20, 2023
    Assignee: EMC IP Holding Company LLC
    Inventors: Amihai Savir, Shay Katz, Michael Timmy Opachevsky, Daniel Shapira, Gal Uzan
  • Patent number: 11677687
    Abstract: A storage system switching between mediation models within a storage system, where the switching between mediation models includes: determining, among one or more of the plurality of storage systems, a change in availability of a mediator service, wherein one or more of the plurality of storage systems are configured to request mediation from the mediator service in response to a fault; and communicating, among the plurality of storage systems and responsive to determining the change in availability of the mediator service, a fault response model to be used as an alternate to the mediator service among one or more of the plurality of storage systems.
    Type: Grant
    Filed: April 20, 2021
    Date of Patent: June 13, 2023
    Assignee: PURE STORAGE, INC.
    Inventors: David Grunwald, Ronald Karr, Thomas Gill, Zoheb Shivani, John Colgrove, Connor Brooks, Claudiu Schmidt
  • Patent number: 11675675
    Abstract: Configuration and replication can be managed across multiple sites for datacenter volumes. A visual representation of a current configuration for a first of a plurality of replication techniques can be conveyed for display on a display device. Changes can be made to the current configuration, producing a future configuration. The future configuration can be analyzed for replication errors, and an updated visual representation can be produced that identified discovered replication errors and highlights differences between the current configuration and the future configuration. The updated visual representation can be conveyed, for display on a display device.
    Type: Grant
    Filed: May 10, 2022
    Date of Patent: June 13, 2023
    Assignee: Wells Fargo Bank, N.A.
    Inventor: Scott Davis Bissmeyer
  • Patent number: 11664085
    Abstract: Exemplary methods, apparatuses, and systems include determining that data in a group of memory cells of a first memory device is to be moved to a spare group of memory cells. The group of memory cells spans a first dimension and a second dimension that is orthogonal to the first dimension and the spare group of memory cells also spans the first dimension and the second dimension. The data is read from the group of memory cells along the first dimension of the group of memory cells. The data is written to the spare group of memory cells along the second dimension of the spare group of memory cells.
    Type: Grant
    Filed: July 6, 2021
    Date of Patent: May 30, 2023
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Samuel E. Bradshaw, Justin Eno
  • Patent number: 11663070
    Abstract: A system stores logs representing events that occur in the system based on executable instructions executed by the system, for example, by processes executing within the system or by applications. The system analyzes the logs to determine the root cause of the error or event that resulted in generation of the log. The system clusters logs to determine clusters of logs. The system analyzes logs of each cluster to determine a root cause of errors resulting in logs belonging to the cluster. For any new error log that is received, the system determines the cluster to which the error log belongs and takes action based on the root cause associated with the cluster, for example, sending an alert message or performing automatic remediation.
    Type: Grant
    Filed: January 13, 2022
    Date of Patent: May 30, 2023
    Assignee: Salesforce, Inc.
    Inventor: Siddharth Srivastava
  • Patent number: 11650897
    Abstract: Systems and methods for asset management are provided. Event data characterizing events experienced by assets distributed among different sites of a fleet is maintained. The event data includes an asset location within an asset hierarchy of the fleet and an event parameter corresponding to the event. A graphical user interface (GUI) is generated that displays a first window including a hierarchical list of assets organized according to their position within the asset hierarchy. When the GUI receives a selection of a level within the hierarchical list, events associated with the selected level can be identified. Identified events can be classified based upon their event data as a unique event having a single occurrence or a repeat event having multiple occurrences. In response to receipt of the selection, the GUI is updated to display a second window listing single entries for respective unique events and single entries for respective repeat events.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: May 16, 2023
    Assignee: Baker Hughes Holdings LLC
    Inventors: Shamika Khanolkar, Jackie Tappan, Jojy Chakkalackal, Chelsea O'Bryan
  • Patent number: 11645185
    Abstract: Micro-architectural fault detectors are described. An example of storage mediums includes instructions for receiving one or more micro instructions for scheduling in a processor, the processor including one or more processing resources; and performing fault detection in performance of the one or more micro instructions utilizing one or more of a first idle canary detection mode, wherein the first mode includes assigning at least one component as an idle canary detector to perform a canary process with an expected outcome, and a second micro-architectural redundancy execution mode, wherein the second mode includes replicating a first micro instruction to generate micro instructions for performance by a set of processing resources.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: May 9, 2023
    Assignee: INTEL CORPORATION
    Inventors: Reuven Elbaum, Chaim Shen-Orr, Assaf Admoni
  • Patent number: 11640329
    Abstract: An event graph schema for a technology landscape may be determined, where the technology landscape is characterized using scores assigned to performance metrics. The event graph schema may include a plurality of nodes corresponding to the performance metrics and the scores, and directional edges connecting node pairs of the plurality of nodes, with each directional edge having a score-dependent validity criteria defined by scores of a corresponding node pair. Anomalous scores associated with an event within the technology landscape may be used to find anomalous nodes. Valid edges connecting two of the anomalous nodes and satisfying the score-dependent validity criteria thereof may be used to determine at least one path that includes the valid edges and connected anomalous nodes. In this way, it is possible to traverse the at least one path to identify at least one of the connected anomalous nodes as a root cause node of the event.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: May 2, 2023
    Assignee: BMC Software, Inc.
    Inventors: Nigel Slinger, Wenjie Zhu
  • Patent number: 11630971
    Abstract: Software performance can be predicted based on different system configurations. In one example, a computing device can receive historical datasets associated with copies of a software application executed by a group of computing environments during a prior timespan. Each historical dataset can indicate respective changes during the prior timespan to at least one performance characteristic of one of the copies of the software application executed by one of the computing environments in the group. Each computing environment in the group can being configured differently than the other computing environments in the group. The computing device can also convert the historical datasets into training data for a machine-learning model, and train the machine-learning model. This can yield a trained machine-learning model configured to generate a forecast of the performance characteristic for the software application over a future timespan.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: April 18, 2023
    Assignee: RED HAT, INC.
    Inventor: Marcel Hild
  • Patent number: 11630731
    Abstract: In various embodiments, a method for page cache management is described. The method can include: identifying a storage device fault associated with a fault-resilient storage device; determining that a first region associated with the fault-resilient storage device comprises an inaccessible space and that a second region associated with the fault-resilient storage device comprises an accessible space; identifying a read command at the second storage device for the data and determine, based on the read command, first data requested by a read operation from a local memory of the second storage device; determining, based on the read command, second data requested by the read operation from the second region; retrieving the second data from the second region; and scheduling a transmission of the second data from the fault-resilient storage device to the second storage device.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: April 18, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yang Seok Ki, Sungwook Ryu
  • Patent number: 11593669
    Abstract: Techniques for determining insight are described. An exemplary method includes receiving a request to provide insight into potential abnormal behavior; receiving one or more of anomaly information and event information associated with the potential abnormal behavior; evaluating the received one or more of the anomaly information and event information associated with the abnormal behavior to determine there is insight as to what is causing the potential abnormal behavior and to add to an insight at least two of an indication of a metric involved in the abnormal behavior, a severity for the insight indication, an indication of a relevant event involved in the abnormal behavior, and a recommendation on how to cure the potential abnormal behavior; and providing an insight indication for the generated insight.
    Type: Grant
    Filed: November 27, 2020
    Date of Patent: February 28, 2023
    Assignee: Amazon Technologies, Inc.
    Inventors: Jasmeet Chhabra, Zaid Radi Abu Ziad, Vikas Dharia, Harshad Vasant Kulkarni, Khaled Salah Sedky, Scott Michael Wiltamuth, Douglas Allen Walter
  • Patent number: 11592483
    Abstract: Electronic scan circuitry includes a decompressor (510), a plurality of scan chains (520.i) fed by the decompressor (510), a scan circuit (502, 504) coupled to the plurality of scan chains (520.i) to scan them in and out, a masking circuit (590) fed by the scan chains (520.i), and a scannable masking qualification circuit (550, 560, 580) coupled to the masking circuit (590), the masking qualification circuit (550, 560, 580) scannable by scan-in of bits by the decompressor (510) along with scan-in of the scan chains (520.i), and the scannable masking qualification circuit (550, 560, 580) operable to hold such scanned-in bits upon scan-out of the scan chains through the masking circuit (590). Other scan circuitry, processes, circuits, devices and systems are also disclosed.
    Type: Grant
    Filed: August 6, 2021
    Date of Patent: February 28, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Prakash Narayanan, Rubin A Parekhji, Arvind Jain, Sundarrajan Subramanian
  • Patent number: 11579999
    Abstract: A computer-implemented system for dynamic aggregation of data and minimization of data loss is disclosed. The system may be configured to perform instructions for: aggregating information from a plurality of networked systems by collecting a set of data from the networked systems, the set of data comprising data associated with a predetermined period of time and comprising one or more central variables that are included in data associated with more than one networked systems of the plurality of networked systems and one or more associated variables that describe one or more aspects of the central variables; retrieving one or more data transformation rules based on a relational map among the central variables and the associated variables; and aggregating the first set of data into one or more master data structures corresponding to the central variables based on the data transformation rules.
    Type: Grant
    Filed: April 13, 2020
    Date of Patent: February 14, 2023
    Assignee: Coupang Corp.
    Inventors: Il Won Nam, Seung Hoon Park, Ki Young Kim
  • Patent number: 11531590
    Abstract: A method of error management includes, in response to a read request for first data from a first storage device of a plurality of storage devices under one or more common data protection schemes, receiving a read uncorrectable indication regarding the first data, obtaining uncorrected data and metadata of an LBA associated with the first data, and obtaining the same LBA from one or more other storage devices of the plurality. The method further includes comparing the uncorrected data with the data and metadata from the other storage devices, speculatively modifying the uncorrected data based, at least in part, on the other data to create a set of reconstructed first data codewords, and, in response to a determination that one of the reconstructed first data codewords has recovered the first data, issuing a write_raw command to rewrite the modified data and associated metadata to the first storage device.
    Type: Grant
    Filed: January 9, 2020
    Date of Patent: December 20, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Daniel Lee Helmick, Cory James Peterson, Jay Sarkar