Abstract: A control system for power delivered to an inductive load includes automatic control with a manual override for emergency situations. The system monitors the power delivered to the load and varies the power delivered to the inductive load by controlling the phase difference between the voltage and current delivered to the load. Feedback to the control system automatically controls the phase difference between voltage and current in response to the measured power delivered to the load. Provision is made for introducing an external signal into the feedback circuit, whereby the external signal supersedes the automatic control of the power delivered to the load.

Abstract: A band-gap voltage reference forming part of a CMOS IC chip. A .DELTA.V.sub.BE voltage is developed by stacked pairs of parasitic bipolar transistors, with the transistors of each pair operated at different current densities. MOS buffer transistors are connected at corresponding ends of the stacks where the .DELTA.V.sub.BE voltage is developed. The bipolar transistors are driven by MOS current sources.

Abstract: A DC-DC power converter cell is disclosed which incorporates novel control circuits that operates the cell at efficiencies of 88%. This cell also has control-in and control-out terminals whereby multiple cells are intercoupled to operate in synchronization with each other as a versatile system of cells. Manufacturing cost is reduced by utilizing a simply configured single-turn high-frequency transformer in each cell, and by operating at efficiencies that reduce cooling requirements.

Abstract: An improvement of control for prevention of a short circuit between controllable elements used as switching elements in a pulse-width modulation type inverter apparatus which outputs a variable amplitude or variable frequency a.c. voltage. The pulse-width modulation type inverter apparatus is of a type wherein, a selecting means selects an output from a processing means within a period during which the result of detection by a current detector falls within a region of substantially zero level and also selects only a signal corresponding to each switching element which effectively acts on the generation of the output current, out of signals generated by a PWM signal generating means during a period other than the above-described period, thereby to output the same as a drive signal for the switching element.

Abstract: A single-chip solid-state bidirectional switch comprises two power MOS transistors (TP1, TP2) connected by their drains (D1, D2), and the sources of which (S1, S2) constitute the main terminals (A1, A2) of the switch; two auxiliary MOS transistors (T1, T2) each of which is connected by its main terminals between the source and the gate of each power transistor, the gates of those auxiliary MOS transistors being connected to the common drain of the power transistors; and two high-value resistors (R1, R2), respectively connected between the gate (G1, G2) of each power transistor and the control terminal (G) of the solid-state switch.