Abstract: A method of fabricating a transistor includes forming a field isolation region in a substrate. After forming the field isolation region, dopant is implanted in a first region of a substrate for formation of a drift region. A drain region is formed in a second region of the substrate. The first and second regions laterally overlap to define a conduction path for the transistor. The first region does not extend laterally across the second region.

Abstract: Embodiments of the present invention include a conductive particle that includes a conductive nickel/gold (Ni/Au) complex metal layer having a phosphorous content of less than about 1.5 weight percent formed on the surface of a polymer resin particle. Methods of forming the same are also included. A conductive particle with a Ni/Au complex metal layer having less than about 1.5 weight percent of phosphorous may have relatively high conductivity while providing relatively good adhesion of the Ni/Au metal layer to the polymer resin particle. Further embodiments of the present invention provide an anisotropic adhesive composition comprising a conductive particle according to an embodiment of the invention.

Abstract: The inductor for a semiconductor device includes at least one dielectric pattern selectively formed on a top of the interlayer dielectric, at least one first metal wire formed on a top of the interlayer dielectric, at least one second metal wire formed on a top of the dielectric pattern, and an upper protective film formed on the top of the interlayer dielectric to completely cover the first and second metal wires, wherein the first and second metal wires are alternately arranged at different vertical locations and are formed in a spiral configuration.

Abstract: Disclosed a multi-chip module with solder corrosion prevention including one or more chips connected to a substrate by soldering, the substrate disposed on a printed circuit board. The multi-chip module also includes a quantity of molecular sieve desiccant, and a first cover to contain the one or more chips, the substrate, and the molecular sieve desiccant, the first cover having a seal to the printed circuit board.

Abstract: A second shield layer, under the master shielding layer, is added to a segmented MRAM array. This additional shielding is patterned so as to provide one shield per bit slice. The placement of longitudinal biasing tabs at the ends of these segmented shields ensures that each segmented shield is a single magnetic domain, making it highly effective as a shield against very small stray fields.

Abstract: Integrated circuit dies are prepared for imaging by completely etching away all metal from the metal lines without removing barrier layers that underlie the metal lines. The metal vias may also be removed, especially if they are formed from the same metal as the metal lines, as in copper damascene circuits. This provides high contrast images that permits circuit layout extraction software to readily distinguish between metal lines and vias.

Abstract: A MEMS device having a proof mass resiliently mounted above a substrate has projections formed on adjacent surfaces of the mass and substrate. The device is formed by creating a plurality of holes in the upper layer. A substance suitable for removing the intermediate layer without substantially removing the upper layer and substrate is introduced through the holes. A substance removing the upper layer, the substrate, or both, is then introduced through the holes to remove a small amount of the substrate and upper layer. Portions of the intermediate layer between the projections are then removed. The dimple structure fabricated from this process will prevent MEMS device stiction both in its final release and device operation.

Abstract: In a semiconductor device having a MEMS according to this invention, a plurality of units having movable portions for constituting a MEMS are monolithically mounted on a semiconductor substrate on which an integrated circuit including a driving circuit, sensor circuit, memory, and processor is formed. Each unit has a processor, memory, driving circuit, and sensor circuit.

Abstract: A method of manufacturing a semiconductor laser element having an enhanced yield ratio is provided. The semiconductor laser element having a cladding layer, an intermediate layer, and a capping layer is manufactured as follows. At the laminating step, a plurality of lamination layers are laminated in a laminating direction. Subsequently, at protruding step, a cladding layer, a capping layer and a precursor of an intermediate layer are formed so that widthwise lengths of the cladding layer and the capping layer become shorter or uniform in the laminating direction, and so that the precursor of an intermediate layer protrudes widthwise from the cladding layer and the capping layer. At removing step, an protrusion of the precursor of the intermediate layer is removed.

Abstract: A semiconductor light-emitting device including a light-emitting layer forming portion, a semiconductor substrate of a first conductivity type, a first electrode which is disposed on a surface of the semiconductor substrate of the first conductivity type, a semiconductor substrate of a second conductivity type, and a second electrode which is disposed a surface of the semiconductor substrate of the second conductivity type, at least one of the semiconductor substrate of the first conductivity type and the semiconductor substrate of the second conductivity type having an interstice located near an outer side surface on a side close to the light-emitting layer forming portion and around a joined surface on a principal surface of the light-emitting layer forming portion.

Abstract: A method for changing an amorphous silicon film to a poly-crystalline silicon film includes the steps of irradiating an elongate pulse laser beam onto the silicon film while scanning in the direction normal to the major axis of the elongate pulse laser beam, to form a plurality of irradiated areas, irradiating flat-surface light onto the irradiated areas in the direction parallel to the major axis, and analyzing distribution of the reflected light from the irradiated areas to determine the threshold value of micro-crystallization. The threshold value is used to further determine an energy density of the elongate pulse laser beam for the phase change process.

Abstract: A light emitting device includes an active layer including atoms A of a matrix semiconductor having a tetrahedral structure, a heteroatom D substituted for the atom A in a lattice site, and a heteroatom Z inserted into an interstitial site positioned closest to the heteroatom D, the heteroatom D having a valence electron number differing by +1 or ?1 from that of the atom A, and the heteroatom Z having an electron configuration of a closed shell structure through charge compensation with the heteroatom D, and an n-electrode and a p-electrode adapted to supply a current to the active layer.

Abstract: A second shield layer, under the master shielding layer, is added to a segmented MRAM array. This additional shielding is patterned so as to provide one shield per bit slice. The placement of longitudinal biasing tabs at the ends of these segmented shields ensures that each segmented shield is a single magnetic domain, making it highly effective as a shield against very small stray fields.

Abstract: A circuit board including a flexible insulating substrate, a plurality of conductive wirings placed in line on the flexible insulating substrate, and bumps provided at end portions of the respective conductive wirings positioned in a region for mounting a semiconductor chip is provided. The circuit board further includes an auxiliary conductive wiring positioned at an outermost corner of the region for mounting the semiconductor chip, being adjacent to and an outside the outermost conductive wiring, and an auxiliary bump formed on the auxiliary conductive wiring in line with the bumps on the conductive wirings.

Abstract: A method of fabricating an electronic device and a resulting electronic device. The method includes forming a pad oxide layer on a substrate, forming a silicon nitride layer over the pad oxide layer, and forming a top oxide layer over the silicon nitride layer. A first dopant region is then formed in a first portion of the substrate. A first portion of the top oxide layer is removed; a remaining portion of the top oxide layer is used to align a second dopant mask and a second dopant region is formed. An annealing step drives-in the dopants but oxygen diffusion to the substrate is limited by the silicon nitride layer; the silicon nitride layer thereby assures that the uppermost surface of the silicon is substantially planar in an area proximate to the dopant regions after the annealing step.

Abstract: A multi-bridge-channel MOSFET (MBCFET) may be formed by forming a stacked structure on a substrate that includes channel layers and interchannel layers interposed between the channel layers. Trenches are formed by selectively etching the stacked structure. The trenches run across the stacked structure parallel to each other and separate a first stacked portion including channel patterns and interchannel patterns from second stacked portions including channel and interchannel layers remaining on both sides of the first stacked portion. First source and drain regions are grown using selective epitaxial growth. The first source and drain regions fill the trenches and connect to second source and drain regions defined by the second stacked portions. Marginal sections of the interchannel patterns of the first stacked portion are selectively exposed. Through tunnels are formed by selectively removing the interchannel patterns of the first stacked portion beginning with the exposed marginal sections.

Abstract: A method for crystallizing an amorphous semiconductor thin film using a non-metal seed epitaxial growth (NSEG) is provided. The method includes the steps of: forming a pair of non-metal seeds for inducing a crystallization of an amorphous semiconductor thin film at a predetermined distance on a transparent insulation substrate; depositing the amorphous semiconductor thin film on the insulation substrate; and heat-treating the insulation substrate to thereby epitaxially grow a poly-crystalline semiconductor thin film from the non-metal seeds, and to thus crystallize the amorphous semiconductor thin film. In the crystallization method, non-metal seeds are used instead of using crystallization induced metal to thereby epitaxially grow the poly-crystalline semiconductor thin film and to thus realize the amorphous semiconductor thin film without having metal pollution.