Abstract: A light-emitting device includes: a base member; a base body formed on an upper surface of the base member, the base body including a wiring layer; a light-emitting element mounted on an upper surface of the base body, wherein the light-emitting element includes an element-substrate, and a semiconductor layer located on the element-substrate; a resin frame located on the upper surface of the base body; and a first resin located inside the resin frame to cover a part of side surfaces of the light-emitting element, a part of inner side surface of the resin frame, and the upper surface of the base body. The first resin includes: a reflective material layer that contains a reflective material, and a resin layer that is located on an upper surface of the reflective material layer and does not contain the reflective material.

Abstract: A semiconductor device includes a lower electrode structure, an upper electrode structure, and a dielectric layer between the lower and upper electrode structures and on side surfaces and an upper surface of the lower electrode structure. The lower electrode structure includes a first lower electrode pattern having a cylindrical shape, a barrier layer on the first lower electrode pattern, and a second lower electrode pattern in a space defined by the barrier layer.

Abstract: An elevated photosensor for image sensors and methods of forming the photosensor. The photosensor may have light sensors having indentation features including, but not limited to, v-shaped, u-shaped, or other shaped features. Light sensors having such an indentation feature can redirect incident light that is not absorbed by one portion of the photosensor to another portion of the photosensor for additional absorption. In addition, the elevated photosensors reduce the size of the pixel cells while reducing leakage, image lag, and barrier problems.

Abstract: A display device includes a carrier, a substrate unit, a plurality of light emitting elements and a circuit unit. The carrier has a top surface and a bottom surface opposite to each other, and a peripheral surface interconnecting the top and bottom surfaces. The substrate unit is disposed on one side of the peripheral surface of the carrier. The light emitting elements are spacedly disposed on the top surface of the carrier. The circuit unit includes a plurality of circuit modules that are disposed on the substrate unit and that are electrically connected to the light emitting elements. Each of the circuit modules includes a switch control circuit and a driving circuit that are configured to control the light emitting elements.

Abstract: A component is disclosed. In an embodiment the component includes a light-emitting element and a structured layer having an optical functionality, wherein the structured layer is arranged on the light-emitting element.

Abstract: A light-emitting display unit including first to third metal layers, first to second insulation layers and micro light-emitting devices is provided. The first metal layer has conductive patterns. The second metal layer has transfer patterns. The third metal layer has pad patterns. The second metal layer is located between the first metal layer and the third metal layer. A distribution density of the first metal layer is less than that of the second metal layer, and greater than that of the third metal layer. The first insulation layer is disposed between the first metal layer and the second metal layer. The second insulation layer is disposed between the second metal layer and the third metal layer. The micro light-emitting devices are disposed on one side of the first metal layer away from the second metal layer, and electrically bonded to the conductive patterns. A display apparatus adopting the light-emitting display unit is also provided.

Abstract: A micro LED display includes a display substrate, a first soldering layer, at least one second soldering layer, first micro LEDs and at least one second micro LED. The display substrate includes a substrate having a plurality of pixel areas, a first circuit layer and a second circuit layer, and the first circuit layer and the second circuit layer are arranged in each pixel area. The first soldering layer is disposed on the first circuit layer, and the second soldering layer is disposed on the second micro LED. An arranging area of the first soldering layer is greater than an arranging area of the second soldering layer. The first micro LEDs is bonding to the first circuit layer in each pixel area through the first soldering layer. The second micro LED is bonding to the second circuit layer of one of the pixel areas through the second soldering layer.

Abstract: A method includes forming a dummy gate over a substrate. A first gate spacer is formed on a side of the dummy gate. The dummy gate is replaced with a gate structure, such that that first gate spacer is on a side of the gate structure. The gate structure is etched back. After etching back the gate structure, a top portion of the first gate spacer is removed. A second gate spacer is formed over a remaining portion of the first gate spacer. After forming the second gate spacer, a dielectric cap is formed over the gate structure.

Abstract: A micro light emitting diode (LED) having a high light extraction efficiency includes a bottom conductive layer, a light emitting layer on the bottom conductive layer, and a top conductive structure on the light emitting layer. The micro LED additionally includes a conductive side arm electrically connecting the sidewall of the light emitting layer with the bottom conductive layer, and a reflective bottom dielectric layer arranged under the light emitting layer and above the bottom conductive layer. In some embodiments, the micro LED further includes an ohmic contact between the top conductive structure and the light emitting layer that has a small area and is transparent, thereby increasing the light emergent area and improving the light extraction efficiency.

Abstract: A flip light emitting chip and a manufacturing method thereof are disclosed, wherein the flip light emitting chip comprises an N-type semiconductor layer, an active region, a P-type semiconductor layer, a reflective layer, a barrier layer, a bonding layer, a first insulating layer, an extended electrode layer, a second insulating layer, an N-type electrode, and a P-type electrode sequentially grown from a substrate. The first insulating layer has at least one first channel and at least one second channel. A first extended electrode portion and a second extended electrode portion of the extended electrode layer are respectively formed on the first insulating layer and extended to the N-type semiconductor layer via the first channel and to the barrier layer via the second channel. The second insulating layer has at least one third channel and at least one fourth channel.

Abstract: The present application disclose a method for preparing an oriented heat conducting sheet, which includes the following steps: Step S1, preparing a fluid composition for the heat conducting sheet; Step S2, placing the fluid composition obtained in the step S1 in an orientation molding device, applying a circumferential high-speed shear force to the fluid composition layer by layer to enable thermal conducting fillers in the fluid composition to be oriented along a shear direction to form an oriented thin-layer composition, and collecting the thin-layer composition layer by layer in a die to form a continuous multi-layer aggregate; Step S3, heat curing the multi-layer aggregate to obtain an oriented composition block; and S4, slicing the oriented composition block along the direction perpendicular to an orienting direction of the oriented composition block to obtain an oriented heat conducting sheet.

Abstract: A light-emitting device includes: a light-emitting element having an upper surface, and including a plurality of semiconductor light-emitting structures; and a substrate supporting the light-emitting element. The semiconductor light-emitting structures include a first semiconductor light-emitting structure and a second semiconductor light-emitting structure. The substrate includes: an interconnection layer including: a first interconnection portion comprising a first land, a second interconnection portion comprising a second land and a third land, and a third interconnection portion comprising a fourth land, and a first reflective member covering a portion of the interconnection layer and having an opening. The light-emitting element is located inside the opening of the first reflective member as viewed from above. A portion of the first land, a portion of the second land, a portion of the third land, and a portion of the fourth land are exposed in the opening of the first reflective member.

Abstract: The present disclosure provides an LED light source, a surface light source display module, and a preparation method for the LED light source. The LED light source includes: an LED chip including a first reflective layer, a P—GaN layer, a light-emitting layer, an N—GaN layer and a substrate, which are sequentially arranged from bottom to top; a light excitation layer configured for emitting light upon excitation with a blue light, wherein the LED chip is covered by the light excitation layer, that is, the light excitation layer is disposed on a top surface of the substrate of the LED chip and in contact with a side surface of the LED chip, wherein four side surfaces of the light excitation layer are defined as light output regions; and a second reflective layer disposed on a top surface of the light excitation layer, and a top surface of the second reflective layer is defined as a total reflection region or a partial reflection region. The light emission angle of the LED light source can be enlarged.

Abstract: A light-emitting module includes: a light-transmitting lightguide plate; light sources disposed on the lightguide plate, each light source including a light-emitting element and a cover member including a first resin and provided beside a lateral surface of the light-emitting element, with first and second electrodes exposed through the cover member; a light-reflecting member provided on the lightguide plate and provided around the light sources, with the cover members of exposed through the light-reflecting member, wherein the light-reflecting member includes a second resin having a higher hardness than the first resin; a support layer covering the light-reflecting member and the cover members, with the first electrodes and the second electrodes exposed through the support layer, wherein the support layer includes a third resin having a higher hardness than the first resin; and a wiring layer provided on the support layer and connected to the first electrodes and the second electrodes.

Abstract: An LED array on a sapphire substrate may be mounted on a silicon interconnect chip, with LEDs of the array inserted into holes of waveguides on the silicon interconnect chip. The sapphire substrate and the silicon interconnect chip may both have microbumps for carrying electrical signals to or from the LEDs, and the sapphire substrate and silicon interconnect chip may be bonded together using the microbumps. The LEDs may be configured to preferentially emit light in a lateral direction, for increased coupling of light into the waveguides.

Abstract: A light-emitting unit includes: a wiring board; light-emitting elements on the wiring board; a light reflecting member on the wiring board, the light reflecting member covering a lateral surface of each of the light-emitting elements; wavelength conversion layers each provided on or above an emission surface of a corresponding one of the plurality of light-emitting elements; light reflecting layers on the wavelength conversion layers, respectively; and a protecting layer configured to transmit light and provided on the light reflecting member. The light-transmitting protecting layer covers at least a lateral surface of the wavelength conversion layers and at least a lateral surfaces of the light reflecting layers. An upper surface of the protecting layer has a first recess in a region where the plurality of light reflecting layers are not present in a top view. The first recess includes at least one concave surface.

Abstract: A method of forming a device on a substrate with recessed first/third areas relative to a second area by forming a fin in the second area, forming first source/drain regions (with first channel region therebetween) by first/second implantations, forming second source/drain regions in the third area (defining second channel region therebetween) by the second implantation, forming third source/drain regions in the fin (defining third channel region therebetween) by third implantation, forming a floating gate over a first portion of the first channel region by first polysilicon deposition, forming a control gate over the floating gate by second polysilicon deposition, forming an erase gate over the first source region and a device gate over the second channel region by third polysilicon deposition, and forming a word line gate over a second portion of the first channel region and a logic gate over the third channel region by metal deposition.

Abstract: Examples of an integrated circuit with a capacitor structure and a method for forming the integrated circuit are provided herein. In some examples, an integrated circuit device includes a substrate and a trench isolation material disposed on the substrate. An isolation structure is disposed on the trench isolation material. A first electrode disposed on the isolation structure, and a second electrode disposed on the isolation structure. A capacitor dielectric is disposed on the isolation structure between the first electrode and the second electrode. In some such examples, the isolation structure includes a first hard mask disposed on the trench isolation material, a dielectric disposed on the first hard mask, and a second hard mask disposed on the dielectric.

Abstract: An electronic device comprising at least one high aspect ratio feature in a base stack of materials, overlay marks in or on only an upper portion of the base stack of materials, and an additional stack of materials adjacent the base stack of materials, the additional stack of materials comprising the at least one high aspect ratio feature. Additional electronic devices and memory devices are disclosed, as are methods of forming high aspect ratio features in an electronic device.

Abstract: Methods of forming a capacitor structure might include forming a first and second conductive regions having first and second conductivity types, respectively, in a semiconductor material, forming a dielectric overlying the first and second conductive regions, forming a conductor overlying the dielectric, and patterning the conductor, the dielectric, and the first and second conductive regions to form a first island of the first conductive region, a second island of the first conductive region, an island of the second conductive region, a first portion of the dielectric overlying the first island of the first conductive region separated from a second portion of the dielectric overlying the second island of the first conductive region and the island of the second conductive region, and a first portion of the conductor overlying the first portion of the dielectric separated from a second portion of the conductor overlying the second portion of the dielectric.