Abstract: A lower electrode 106 with the temperature at its mounting surface set at 40° C. is provided inside a processing chamber 104 of an etching apparatus 100. After a wafer W is placed on the lower electrode 106, a processing gas with its gas composition and gas flow rate expressed as C4F8: CH2F2: Ar=7:4:500 (sccm) is induced into the processing chamber 104 while sustaining the pressure of the atmosphere inside the processing chamber 104 at 50 (mTorr). High-frequency power at 1500 (W) with the frequency at 13.56 (MHz) is applied to the lower electrode 106 to generate plasma. With the plasma thus generated, a carbon film is formed at shoulder 207 of an SiNx film layer 206 exposed inside a contact hole 210 and, at the same time, accumulation of carbon at the bottom of the contact hole 210 is prevented, to form a contact hole 210 achieving a high aspect ratio while preventing damage to the SiNx film layer.

Abstract: An etching back process to improve topographic planarization of a polysilicon layer. First, a polysilicon layer is formed to fill a contact hole between two adjacent insulating structures and cover the entire surface of a semiconductor substrate to a predetermined height, in which a sunken portion is formed in the polysilicon layer over the contact hole. Then, a bottom antireflective coating (BARC) layer is formed to fill the sunken portion and cover the entire surface of the polysilicon layer. Next, in a first etching step, the BARC layer outside the sunken portion of the polysilicon layer is removed and the BARC layer in the sunken portion of the polysilicon layer is retained to flatten the bottom of the sunken portion.

Abstract: A new slurry for shallow trench isolation (STI) processing in the chemical mechanical planarization (CMP) in microelectronic industry comprising an aqueous medium having an abrasive; and a compound which has a carboxylic group and an electrophilic functional group. The combination of ceria and/or titania with amino acids to obtain polishing selectivity's greater than 5:1. CMP is used for removing the excess oxide and planarizing the substrate and the trench. The silicon nitride acts as a stop layer, preventing the polishing of underlying silicon substrate.

Abstract: A method of forming sublithography gate lengths involves the steps of patterning the layer of resist above the gate stack (including a gate layer, hardmask layer and etch-control layer) to a desired gate length and etching the etch-control layer and the hardmask layer; the portion of the circuit that has the correct gate length is covered with a blocking mask and the hardmask in the remainder is wet-etched to reduce its dimension, after which the gate stack is etched using both gate lengths of hardmask to produce different gate lengths in different areas.

Abstract: A method for maintaining critical dimension during the etching of dielectrics, having the following steps: depositing a layer of photoresist over a layer of dielectric; patterning the photoresist such that voids are formed in the photoresist, the voids having sidewalls and a bottom; depositing an overlayer in an etch chamber; transferring the patterning in the photoresist to the dielectric.

Abstract: The present invention includes a method of providing a first substrate; forming an insulator over the first substrate; forming an opening in the insulator; forming a conductor over the insulator and in the opening; removing the conductor over the insulator with a first chemical-mechanical polish process to leave the conductor in the opening; and reducing thickness of the insulator with a second chemical-mechanical process to permit the conductor in the opening to protrude. The present invention further includes a structure having such a conductor that protrudes.

Abstract: A new method of preventing photoresist footing by forming a silicon oxynitride ARC layer having an oxygen-rich surface is described. An insulating layer is provided on a substrate. A metal layer is deposited overlying the insulating layer. A silicon oxynitride antireflective coating layer having an oxygen-rich surface is deposited overlying the metal layer. A photoresist mask is formed overlying the antireflective coating layer wherein the antireflective coating layer prevents photoresist footing. The antireflective coating layer and the metal layer are etched away where they are not covered by the photoresist mask to complete formation of metal lines in the fabrication of an integrated circuit.

Abstract: A method for plasma etching a semiconductor feature to improve an etching profile including providing a semiconductor wafer comprising a first feature opening anisotropically etched though a thickness portion of at least one dielectric insulating layer; anisotropically etching a second feature opening overlying and at least partially encompassing the first feature opening according to a reactive ion etch (RIE) process to leave an unetched portion surrounding a first feature opening portion at about a bottom portion level of the second feature opening; and, plasma treating the first and second openings with a plasma formed of a mixture of oxygen and nitrogen plasma source gases including an applying an independently variable RF bias power source to the semiconductor wafer to remove the unetched portion.

Abstract: A method of planarizing a wafer surface of a semiconductor wafer having an elevated portion extending therefrom is described. The method includes the step of positioning a fluid flow surface relative to the wafer surface so that (i) a space is defined between the wafer surface and the fluid flow surface, and (ii) the elevated portion of the semiconductor wafer is positioned in the space. The method also includes the step of advancing a fluid within the space so that the fluid contacts and erodes the elevated portion of the semiconductor wafer. An associated apparatus for planarizing a wafer surface of a semiconductor wafer having an elevated portion extending therefrom is also described.

Abstract: A method and apparatus for using photoemission to determine the endpoint of a dry etch process. In one embodiment, the endpoint of a dry etch process is determined when the dry etch process is acting on a substrate comprising a layer of a first material overlying a second material. The substrate is illuminated with a beam of monochromatic light. The photon energy of the monochromatic light is greater than the work function of one of the two materials, and less than the work function of the other material. Thus the beam of light is capable of inducing photoemission of electrons in only one of the two materials: the material with a work function less than the photon energy of the beam of light. The electrons emitted by the photoemitting material are collected. The current generated by the collected stream of electrons, the photocurrent, is amplified. A time-series of amplified photocurrent measurements is monitored for changes that correspond to the endpoint of the dry etch process.

Abstract: A high density elongated plasma is produced by the interaction of an electrically conductive planar antenna located outside of a processing chamber, and a magnetic field generating means, also located outside of the processing chamber. A magnetic field perpendicular to the plane of the antenna is generated within the processing chamber by the magnetic field generating means. The antenna is electrically coupled to a radio frequency power source to generate a helicon wave in the processing chamber to produce a plasma of a gas in the processing chamber. The magnetic field generated by the magnetic field generating means elongates the plasma within the processing chamber.

Abstract: Processes for producing and using a novel CVD apparatus for depositing silicon layers onto suitable substrates and for the in-situ etching removal of background silicon deposits from the interior walls of the apparatus. The invention comprises using an apparatus having a fused quartz reaction chamber and precoating the interior wall of the reaction chamber with a thin continuous barrier layer of Al.sub.2 O.sub.3 which is inert to the etching gas introduced for the removal of the background silicon deposits.