Patents Examined by George L. Opie
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Patent number: 6502123Abstract: A computer system includes a real-time interrupt that causes the operating system to determine which isochronous tasks are pending. In one embodiment, applications that include isochronous tasks are certified to be well-behaved and the operating system will only initiate applications that are known to be well-behaved by checking a list of certified applications. The operating system will not initiate an application if insufficient resources are available for executing the tasks of the application. Each application informs the operating system of an execution rate and a maximum duration of its isochronous tasks. Prior to initiating an application, the operating system verifies that resources are available to execute the isochronous tasks of the application. The operating system includes a non-maskable interrupt to terminate isochronous tasks. Termination may be necessary if an isochronous task fails to execute within its specified maximum duration.Type: GrantFiled: June 9, 1998Date of Patent: December 31, 2002Assignee: Advanced Micro Devices, Inc.Inventor: Dale E. Gulick
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Patent number: 6499047Abstract: A computer-readable recording medium is disclosed which comprises a class including, as application program interfaces, a procedure for starting a thread management program which receives a request message to create a thread processes the thread based on the request message; a procedure for terminating the thread management program; and a procedure for registering into the thread management program what is processed by the thread.Type: GrantFiled: May 13, 1998Date of Patent: December 24, 2002Assignee: Sony CorporationInventors: Toshiki Kikuchi, Yasuhiko Yokote
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Patent number: 6487578Abstract: An adaptive resource utilization apparatus for an application. The apparatus includes a costing subsystem engine configured to measure resource utilization of application-defined subsystems within that application as well as a feedback mechanism configured to interface the application to the costing engine. The application is enabled to modify its operating parameters based on resource utilization of its individual subsystems as presented to the application by the feedback mechanism.Type: GrantFiled: September 29, 1997Date of Patent: November 26, 2002Assignee: Intel CorporationInventor: Kumar Ranganathan
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Patent number: 6463480Abstract: The present invention is directed to an environment in which a safe program having high thread isolation can easily be constructed, and the effective utilization of resources can be achieved when concurrently processing a plurality of client requests. More specifically, a client request 101 is transformed into a common format, and stored in a queue 125 in the form of packet information. A control unit 127 reads the packet information, and instructs a thread control unit 131 to create a thread. A thread object 141 referenced only from the created thread is created by copying a thread object template 149 prestored in the system. Client requests are divided into three types: creation of an object, utilization of an object method, and deletion of an object, and a thread is created only during the execution of a client request.Type: GrantFiled: March 10, 1997Date of Patent: October 8, 2002Assignee: International Business Machines CorporationInventors: Michio Kikuchi, Yuichi Nakamura, Seiji Hamada
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Patent number: 6438740Abstract: A system and method for identifying free registers within a program. A depth first search of a flow diagram representing the execution of a program is performed. The search proceeds simultaneously for all the registers and identifies the free registers from the search. The free registers may then be utilized for various applications without saving and restoring the contents of these registers to memory. The system may limit the amount of time spent searching for free registers with a timer.Type: GrantFiled: August 21, 1997Date of Patent: August 20, 2002Assignee: Compaq Information Technologies Group, L.P.Inventors: Andrei Zary Broder, Michael Burrows, Monika Hildegard Henzinger
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Patent number: 6421702Abstract: A computer system includes a real-time interrupt that causes the operating system to determine which isochronous tasks are pending. In one embodiment, applications that include isochronous tasks are certified to be well-behaved and the operating system will only initiate applications that are known to be well-behaved by checking a list of certified applications. The operating system will not initiate an application if insufficient resources are available for executing the tasks of the application. Each application informs the operating system of an execution rate and a maximum duration of its isochronous tasks. Prior to initiating an application, the operating system verifies that resources are available to execute the isochronous tasks of the application. The operating system includes a non-maskable interrupt to terminate isochronous tasks. Termination may be necessary if an isochronous task fails to execute within its specified maximum duration.Type: GrantFiled: June 9, 1998Date of Patent: July 16, 2002Assignee: Advanced Micro Devices, Inc.Inventor: Dale E. Gulick
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Patent number: 6405234Abstract: A processing system executing multiple programs and operating under control of an operating system, comprising a processor unit which includes a dispatch/decode unit under control of the operating system for dispatching and decoding instructions of the multiple programs, the instructions each including a program ID. The processor unit further comprises a plurality of execution units, each separately selectable by the operating system for receiving any of the instructions of the multiple programs from the dispatch/decode unit, wherein one of the execution units is executing an instruction from one of the multiple programs while another of the execution units is executing an instruction from another one of the multiple programs. The processor unit also comprises a retirement unit storing results of executed ones of the instructions uniquely in response to each program ID.Type: GrantFiled: September 11, 1997Date of Patent: June 11, 2002Assignee: International Business Machines CorporationInventor: Sebastian Ventrone
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Patent number: 6381740Abstract: A method and system for incrementally improving the layout of a program image of a computer program to reduce the working set. The system iteratively selects pairs of basic blocks and reorders the basic blocks in the range delimited by the selected pair of basic blocks. The system selects the pairs of basic blocks so that the working set of the computer program is improved by reordering the basic block in the range. Thus, during each iteration, the working set is improved. The system continues with these iterations until a termination condition (e.g., number of iterations) is satisfied. In one embodiment, during each iteration the system designates one of the basic blocks as an initial anchor basic block. The system then repeats the following until the same range of basic blocks is identified twice in a row.Type: GrantFiled: September 16, 1997Date of Patent: April 30, 2002Assignee: Microsoft CorporationInventors: John W. Miller, John R. Douceur, Robert P. Fitzgerald
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Patent number: 6370560Abstract: A load sharing system which minimizes overall costs by assigning segments of a divisible load to distributed processor platforms based on the resource utilization cost of each processor platform. The distributed processor platforms are connected via data links which also have associated resource utilization costs. A controller divides a divisible load or task and assigns each segment of the load or task to a processor platform based on the processor platform's resource utilization cost and data link cost. After the initial allocation, an optimizing reallocation is performed to reduce the overall monetary cost processing the load or task. The optimization can be performed using a pair-wise swapping technique.Type: GrantFiled: March 13, 1998Date of Patent: April 9, 2002Assignee: Research Foundation of State of New YorkInventors: Thomas G. Robertazzi, Serge Luryi, Saravut Charcranoon
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Patent number: 6349322Abstract: A method, system, and computer program product for synchronized thread execution in a multithreaded processor are described. Each synchronized thread refers to at least one object identified by an object identification (OID) that is shared among a plurality of synchronized threads. One of the synchronized threads is selected for execution. Upon entering the selected thread, an entry sequence indicates that the shared object should be locked by pushing its OID onto a lock stack. The operations defined by the selected thread are executed and the indication is removed by pushing the OID from the lock stack.Type: GrantFiled: May 6, 1998Date of Patent: February 19, 2002Assignee: Sun Microsystems, Inc.Inventor: Nik Shaylor
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Patent number: 6292820Abstract: Techniques for porting operating systems of a first class whose representatives include operating systems implementing the POSIX standard to operating systems of a second class whose representatives include operating systems implementing the Win32 API. Processes belonging to operating systems of the first class are characterized by a single thread, parent-child relationships, and signal handlers that execute on the top of the stack; processes belonging to operating systems belonging to the second class have multiple threads, do not have parent-child relationships, and do not necessarily execute their signal handlers at the top of the stack. Techniques are disclosed for implementing signal handling as required for operating systems of the first class and providing a signal to a parent process of the first class when one of its child processes terminates.Type: GrantFiled: July 29, 1996Date of Patent: September 18, 2001Assignee: AT& T Corp.Inventor: David Gerard Korn