Abstract: A radio system for radio communication comprises at least two antennas that are spaced from each other by a distance. The distance is set to enable independent transmission or reception of radio signals via the at least two antennas. The system comprises a selection module configured to select at least one of the at least two antennas for radio transmission and/or radio reception.

Abstract: A CDR method/circuit utilizes a closed-loop clock alignment circuit and a duplicate clock to align a sampling point clock to both mid-interval and optimal sample point phases during data receiving processes. An initial clock is generated having the mid-interval sampling point phase, then the closed-loop clock alignment circuit generates a phase correction signal based on a phase difference between the data sampling clock and the initial clock, and then the phase correction signal is fed back to a high-speed phase mixer to adjust/align the sampling point clock to the initial clock. Subsequently, the duplicate clock is generated and utilized to determine an optimal sampling point phase while the data sampling clock is utilized to read the received data signal, and then the closed-loop clock alignment circuit is re-used to re-align the data sampling clock to the duplicate clock when the optimal sampling point phase is identified.

Abstract: A system comprises a modem, configured to transmit data modulated based on an intermediate frequency within one of a C, X, or Ku band, and a single-stage block-up converter having an input electrically coupled via one inter-facility link cable to the modem, and an output electrically coupled to a high-power amplifier. The single-stage block-up-converter is configured to up-convert the intermediate frequency to a satellite communication frequency within the Ka, Q, or V band.

Abstract: Wireless communication devices are adapted to facilitate multiplexing of signals. According to one example, a wireless communication device can multiplex a first signal and a second signal for transmission across a first resource element and a second resource element. The first resource element may utilize a first subcarrier in a first symbol employing a first numerology. The second resource element may utilize a second subcarrier in a second symbol employing a second numerology that is different from the first numerology, where the second subcarrier overlaps in frequency at least a portion of the first subcarrier. The first and second symbols including the multiplexed first and second signals may subsequently be transmitted. Other aspects, embodiments, and features are also included.

Abstract: Methods and apparatus for facilitating the use of a plurality of antenna beams for communications purposes are described. In at least some embodiments beam priority information is periodically exchanged. Multiple timers are used to ensure beam information is exchanged at intervals intended to facilitate reliable beam synchronization and to control switching to one or more alternative beams in a predictable manner in the event beam change information or beam synchronization information is lost. In some but not all embodiments a wideband beam is used to communicate beam synchronization information when synchronization using narrower beams used for normal data communication is lost.

Abstract: A wideband pulse detector and a method for operating the wideband pulse detector. The wideband pulse detector includes a signal collection unit for receiving electromagnetic pulses, a signal classification unit for classifying the electromagnetic pulses into N channels (where N is an integer of 2 or more) depending on frequency components corresponding to the electromagnetic pulses, a signal detection unit for detecting and holding the classified pulses, and a signal processing unit for converting the held pulses into digital signals, identifying types of the electromagnetic pulses corresponding to the converted digital signals using a classification algorithm, determining signal strengths of the electromagnetic pulses, and then controlling a reset circuit for successive signal detection.

Abstract: A general design method for phasor estimation algorithms on different applications is described based on a complex finite impulse response (FIR) band-pass filter. To facilitate the design of the complex band-pass filter for different requirements and reduce the trial and error process, a design framework based on the error mathematical models is described. Using an absolute value inequality theorem, the general error models between the filter gain and the error limitations of all the valuables measured by phasor measurement units (PMUs) are established separately. The filter design criteria obtained by the error models can determine the passband and stopband gain range of complex band-pass filters.

Abstract: A receiver for detecting and recovering payload data from a received signal comprises a radio frequency demodulation circuit, a detector circuit and a demodulator circuit. The radio frequency demodulation circuit detects the received signal. The received signal carries the payload data as OFDM symbols in one or more of a plurality of time divided frames, each frame including a bootstrap signal, a preamble signal and a plurality of sub-frames. The demodulator circuit detects bootstrap OFDM symbols to identify communications parameters for detecting the fixed length signalling data, detects the fixed length signalling data to identify the communications parameters for detecting the variable length signalling data, detects the variable length signalling data, and uses the fixed and variable length signalling data to detect the payload data.

Abstract: Aspects of the subject disclosure may include, a device having a non-conductive body with first and second ports that are electrically insulated from each other; a first antenna coupled to the first port; and a second antenna coupled to the second port. When the first and second ports are coupled to first and second transmission mediums, respectively: the first and second transmission mediums are electrically insulated from each other, a first electromagnetic wave conveying information and propagating along the first transmission medium causes the first antenna to transmit an RF signal to the second antenna, the RF signal conveys the information, the RF signal received at the second antenna causes a communication signal to be communicated via the second transmission medium, the communication signal conveys the information, and the first electromagnetic wave propagates along the first transmission medium without requiring an electrical return path. Other embodiments are disclosed.

Abstract: A clock frequency supply device includes: a frequency tuner configured to receive an input signal with a carrier frequency, and tune an oscillation frequency of an oscillator based on the carrier frequency; an injector configured to inject the input signal directly into the oscillator after the tuning of the oscillation frequency is completed; and an oscillator configured to generate a reference clock signal with a reference clock frequency based on the injected input signal.

Abstract: This application provides a transmission method that improves performance of detecting a terminal device by a network device. The method includes may include determining, by a network device, frequency hopping sequences of N terminal devices grouped into a plurality of groups in each of L adjacent slots, where any two terminal devices in each group of terminal devices use a same frequency resource, any two groups of terminal devices in each slot use different frequency resources, and each group of terminal devices in each slot includes a maximum of K terminal devices, pilot signals used by each group of terminal devices are elements in a set that includes K different pilot signals, and pilot signals used by any two terminal devices in each group in each slot are different.

Abstract: A receiver device implements enhanced data reception with edge-based clock and data recovery such as with a flash analog-to-digital converter architecture. In an example embodiment, the device implements a first phase adjustment control loop, with for example, a bang-bang phase detector, that detects data transitions for adjusting sampling at an optimal edge time with an edge sampler by adjusting a phase of an edge clock of the sampler. This loop may further adjust sampling in received data intervals for optimal data reception by adjusting the phase of a data clock of a data sampler such a flash ADC. The device may also implement a second phase adjustment control loop with, for example, a baud-rate phase detector, that detects data intervals for further adjusting sampling at an optimal data time with the data sampler.

Abstract: An arrangement and method for hybrid beamforming includes a differential phase shifter. The phase shifter has substantially parallel elongate conductive input and output radio frequency transmission lines. A movable transverse planar conductive coupling element configured to provide capacitive coupling between itself and the input and output lines. The coupling element is slideably movable along an axis of the said input and output transmission lines.

Abstract: A signal responding method includes: receiving a carrier signal with a frequency of 125 KHz via an antenna with a resonance frequency of 13.56 MHz; amplifying the carrier signal and performing analog-to-digital conversion on the amplified carrier signal to obtain a digital signal; acquiring, according to the digital signal, a signal characteristic of the carrier signal which comprises at least a frequency and a phase; and encoding response data at the frequency of the carrier signal to obtain an encoded signal, determining an initial phase to output the encoded signal based on the phase of the carrier signal, and outputting the encoded signal via the antenna, such that the encoded signal and the carrier signal are superposed at a same phase.

Abstract: A radio receiver device is arranged to receive a radio signal modulated with a data packet including an address portion. The radio receiver comprises: a synchronisation circuit portion arranged to produce synchronization information corresponding to the data packet; a demodulation circuit portion comprising a correlator, wherein said demodulation circuit portion is arranged to receive the radio signal and to produce an estimate of the address portion comprising a plurality of demodulated bits using said correlator and the synchronisation information; an address checking circuit portion arranged to receive the plurality of demodulated bits, to check said plurality of demodulated bits for a predetermined bit pattern, and to produce a match flag if it determines that the plurality of demodulated bits corresponds to the predetermined bit pattern.

Abstract: Systems, apparatuses, and methods are described for wireless communications. A wireless device may distribute power for various transmission types based on a priority, which may be received from a base station.

Abstract: Certain aspects of the present disclosure provide methods and apparatus for enhancing a beamforming training procedure. For example, an apparatus for wireless communications may include a processing system configured to generate a first transmit beamforming refinement frame, a first interface configured to output the first transmit beamforming refinement frame for transmission to a wireless node, wherein a first portion of the first transmit beamforming refinement frame is output for transmission via a first transmit beamforming sector and further wherein training fields of the first transmit beamforming refinement frame are output for transmission via two or more second transmit beamforming sectors, and a second interface configured to obtain a first feedback frame from the wireless node indicating one of the second transmit beamforming sectors. The apparatus may be configured to use the indicated second transmit beamforming sector for communication with the wireless node.

Abstract: A semiconductor device contains an integrated circuit (“IC”) capable of being selectively programmed to perform one or more logic functions. The device, in one embodiment, includes multiple logic blocks (“LBs”), a routing fabric, and a configurable wireless communication block (“WCB”). The configurable LBs is able to be selectively programmed to perform one or more logic functions. The routing fabric is used to route information between the configurable LBs and input/output ports based on a routing configuration signals. The configurable WCB, having a control circuit and a built-in transceiver, is configured to facilitate transmitting information between the IC and an external system via a wireless communications network.

Abstract: A method includes, at a first node: transmitting a first synchronization signal at a first time according to a first clock of the first node; back-coupling the first synchronization signal to generate a first self-receive signal; calculating a time-of-arrival of the first self-receive signal according to the first clock; and calculating a time-of-arrival of the second synchronization signal according to the first clock. The method also includes, at the second node: transmitting the second synchronization signal at a second time according to a second clock of the second node; back-coupling the second synchronization signal to generate a second self-receive signal; calculating a time-of-arrival of the second self-receive signal according to the second clock; and calculating a time-of-arrival of the first synchronization signal according to the second clock. The method S100 further includes calculating a time bias and a propagation delay between the pair of nodes based on the time-of-arrivals.

Abstract: Interference cancellation is provided, according to certain aspects, by a filter, a signal detection circuit, synthesis circuitry and signal-generation circuitry. The filter is used to filter an incoming signal having an associated signal-to-noise metric and to output therefrom a filtered signal having an interference attribute of the incoming signal by amplification and/or isolation. The signal detection circuit is used to detect the interference attribute in the filtered signal. The synthesis circuitry is used to synthesize interference in the incoming signal based on the interference attribute. The signal-generation circuitry is used to generate, in response to the synthesized interference in the incoming signal, a filtered version of the incoming signal which provides an improved signal-to-noise metric.