Abstract: A semiconductor process and apparatus includes forming first and second metal gate electrodes (151, 161) over a hybrid substrate (17) by forming the first gate electrode (151) over a first high-k gate dielectric (121) and forming the second gate electrode (161) over at least a second high-k gate dielectric (122) different from the first gate dielectric (121). By forming the first gate electrode (151) over a first SOI substrate (90) formed by depositing (100) silicon and forming the second gate electrode (161) over an epitaxially grown (110) SiGe substrate (70), a high performance CMOS device is obtained which includes high-k metal PMOS gate electrodes (161) having improved hole mobility.
Type:
Grant
Filed:
August 23, 2005
Date of Patent:
April 28, 2009
Assignee:
Freescale Semiconductor, Inc.
Inventors:
Olubunmi O. Adetutu, Mariam G. Sadaka, Ted R. White, Bich-Yen Nguyen